Two-Wire ETH Click

How does it work?

Two-Wire ETH Click is based on the LAN8651B1-E/LM, a compact, low-power, single-port 10BASE-T1S MAC-PHY Ethernet Controller with SPI from Microchip designed according to the IEEE Std 802.3cg-2019 and OPEN Alliance TC-6 10BASE-T1x MAC-PHY Serial Interface specifications. The LAN8651B1-E/LM combines a Media Access Controller (MAC) and PHY to enable low-cost MCUs to access 10BASE-T1S networks. It provides 10Mbit/s half-duplex transmit and receive capability over a single balanced pair of conductors connected to the onboard Ethernet terminal. The LAN8651B1-E/LM also complies with industrial EMC and EMI requirements, making it suitable for functional safety-related applications.

The integrated PHY of the LAN8651B1-E/LM allows for creating both multidrop and point-to-point network topologies, with up to 25m maximum in length for a point-to-point network. The multidrop mode supports up to at least 8 PHYs connected to a common mixing segment of up to at least 25m in length. The ability to connect multiple PHYs to a common mixing segment reduces weight and implementation costs by reducing cabling and switch ports.

The LAN8651B1-E/LM integrated Ethernet MAC communicates with the host MCU through a standard Serial Peripheral Interface (SPI) supporting high clock speed up to 25MHz. Ethernet data transfer as well as command/status commands are performed over a single, serial interface. The serial interface allows of both transmit and receive packets simultaneously between the station controller and the LAN8651B1-E/LM. Packets are typically stored within the LAN8651B1-E/LM before being forwarded to either the station MCU or the network. Alternatively, packets may be transferred in a cut-through mode, with minimal buffering, for applications needing reduced latency. In addition to the Ethernet terminal mentioned above, this board has two jumper settings for enabling 100Ω edge termination at the ends of a 10BASE-T1S segment. Both jumpers must be populated to allow edge termination.

Alongside SPI pins of the mikroBUS™ socket, this Click board™ also has a multi-function interrupt IRQ pin, GPIO interface on IO0 and IOX, and a general reset signal to reset the LAN8651B1-E/LM. In addition to hardware reset, the possibility of a Power-On reset is also provided, achieved using the MIC2790. It also has a Wake-Up function, accomplished by the WI pin or the WI button, and an additional INH indicator set to a low logic state in Sleep mode or a high state when PHY determines a qualified Wake-Up condition. To make identification as simple as possible, this board also has an additional EEPROM memory, the AT24MAC402, accessible via the I2C interface.

NOTE:  To activate IOx general-purpose lines, it is necessary to place 0 Ohm resistors in the places marked for GPIOs on the board.

This Click board™ can only be operated with a 3.3V logic voltage level. The board must perform appropriate logic voltage level conversion before using MCUs with different logic levels.

Specifications

Pinout diagram

This table shows how the pinout on Two-Wire ETH Click corresponds to the pinout on the mikroBUS™ socket (the latter shown in the two middle columns).

Notes	Pin					Pin	Notes
Sleep/Wake Indicator	INH	1	AN	PWM	16	WI	Wake In
Reset / ID SEL	RST	2	RST	INT	15	IRQ	Interrupt
SPI Select / ID COMM	CS	3	CS	RX	14	IO0	General-Purpose I/O
SPI Clock	SCK	4	SCK	TX	13	IOX	General- Purpose I/O
SPI Data OUT	SDO	5	MISO	SCL	12	SCL	I2C Clock
SPI Data IN	SDI	6	MOSI	SDA	11	SDA	I2C Data
Power Supply	3.3V	7	3.3V	5V	10	NC
Ground	GND	8	GND	GND	9	GND	Ground

Onboard settings and indicators

Two-Wire ETH Click electrical specifications

Software Support

MikroElektronika does not provide software support for this Click board™ in the form of libraries, functions, or example code at this moment. The software support is provided by our development partner on this project Microchip. Please visit the Microchips LAN8651B1-E/LM product page or Github repository to get protocol driver support for this IC.