PIC18F4550 Clock
PIC18F4550 Clock
How can I set PIC18F4550 MCU to the highest clock speed possible (48Mhz) with Int. or Ext. oscillator when I only have 20Mhz Ceramic Resonator? I cant figure out what this Oscillator, USB Clock Selection, Sys. Clock Postscale and PLL Prescale fileds for in programmer and how to use them :(
-- Example for 20MHz crystal on your board ---
1) Set _PLL_DIV5_1L.
PLL Prescaler (see Datasheet->Figure 2-1) will then divide 20MHz by 5 and produce 4MHz (needed on 96MHz PLL input).
2) Option 1
If you choose HSPLL oscillator (check _FOSC_HSPLL_HS_1H flag, uncheck _FOSC_INTOSC_HS_1H and _FOSC_HS_1H if checked)
In this case CPU will use 96MHz HSPLL divided by PLL Postscaller, set CPUDIV flags to choose the divider.
_CPUDIV_OSC1_PLL2_1L will divide 96MHz by 2 and CPU will get 48MHz [you need to set Clock field in EditProject to 48MHz]
...
_CPUDIV_OSC4_PLL6_1L will divide 96MHz by 6 and CPU will get 16MHz [you need to set Clock field in EditProject to 16MHz]
Note: PLLx part of the flag is relevant, ignore the OSCx part of the flag
1) Set _PLL_DIV5_1L.
PLL Prescaler (see Datasheet->Figure 2-1) will then divide 20MHz by 5 and produce 4MHz (needed on 96MHz PLL input).
2) Option 1
If you choose HSPLL oscillator (check _FOSC_HSPLL_HS_1H flag, uncheck _FOSC_INTOSC_HS_1H and _FOSC_HS_1H if checked)
In this case CPU will use 96MHz HSPLL divided by PLL Postscaller, set CPUDIV flags to choose the divider.
_CPUDIV_OSC1_PLL2_1L will divide 96MHz by 2 and CPU will get 48MHz [you need to set Clock field in EditProject to 48MHz]
...
_CPUDIV_OSC4_PLL6_1L will divide 96MHz by 6 and CPU will get 16MHz [you need to set Clock field in EditProject to 16MHz]
Note: PLLx part of the flag is relevant, ignore the OSCx part of the flag
