AD9850 DDS freq loading problem.

[flavinm]

Below is the code I am using to try and program an AD9850 DDS. I think I have either a bad mocule or perhaps a wrong setting on the PORTD. I have tried LATD and TRISD. I have no pullups set on development board and chip is 18f45k22. I get LEDS on anyway and they do blink with the code, hence the delays. Thanks for any input. I have another module coming but thought some one might see a reason it doesnt actually get to the AD9850

Code: Select all

  ANSELB = 0;                 // Configure PORTB pins as digital
  //ANSELA = 0;             // Configure RA1 pin as analog
  ANSELC = 0;                // Configure PORTC pins as digital
  ANSELD = 0;                // Configure PORTD pins as digital
  //ANSELE = 0;
  TRISD = 0b00000000;              // Set RA1 pin as input
  TRISC = 0b11111111;                  // Set PORTC as input
  //LATD = 0b00000000;                   // Set PORTD as OUTPUT
  TRISB = 0b11000000;
  //C1ON_bit = 0;                          // Disable comparators
  //C2ON_bit = 0;
  IOCB = 0x80;
  INTCON.RBIE = 1;
  INTCON.RBIF = 0;
  //T0CON = 0b00000111;
  //INTCON.TMR0IE = 0;
  //INTCON.TMR0IF = 0;
  INTCON.GIE =1;

  TRISD0_bit = 0;
  TRISD2_bit = 0;
  TRISD4_bit = 0;
  TRISD6_bit = 0;

Code: Select all

void ad9850_wr_serial(unsigned char w0,double frequence)
{
unsigned char i,w;
long int y;
double x;

frequence=frequence/1000000;
y =(frequence * pow(2, 32)) / 125;

w=(y>>=0);                //write config bits SB
for(i=0;i<8;i++)
{
ad9850_bit_data=(w>>i)&0x01;
delay_ms(50);
ad9850_w_clk=1;
delay_ms(50);
ad9850_w_clk=0;
delay_ms(50);
}

w=(y>>8);                //write next 8 bits
for(i=0;i<8;i++)
{
ad9850_bit_data=(w>>i)&0x01;
delay_ms(50);
ad9850_w_clk=1;
delay_ms(50);
ad9850_w_clk=0;
delay_ms(50);
}

w=(y>>16);                //write next 8 bits
for(i=0;i<8;i++)
{
ad9850_bit_data=(w>>i)&0x01;
delay_ms(50);
ad9850_w_clk=1;
delay_ms(50);
ad9850_w_clk=0;
delay_ms(50);
}

w=(y>>24);                //write next 8 bits
for(i=0;i<8;i++)
{
ad9850_bit_data=(w>>i)&0x01;
delay_ms(50);
ad9850_w_clk=1;
delay_ms(50);
ad9850_w_clk=0;
delay_ms(50);
}

w=w0;                   //write last 8 bits
for(i=0;i<8;i++)
{
ad9850_bit_data=(w>>i)&0x01;
delay_ms(50);
ad9850_w_clk=1;
delay_ms(50);
ad9850_w_clk=0;
 delay_ms(50);
}

ad9850_fq_up=1;
delay_ms(50);
ad9850_fq_up=0;
}