16f887 why have two vss and two vdd pins?

[westonbrett]

hi,

starting to create a pcb for my 16f887 project but dont understand why the chips has two vss pins and two vdd pins do I need to connect both or will one set be ok to connect ???

Thanks brett

[around]

Brett,

You must connect all the VDD and VSS pins on the chip. The 16F datasheets are poor when it comes to this information but the 18F datasheets are much clearer.

Cheers,

Adrian

[westonbrett]

ok i did just incase thanks for the info nice one

[vipin.p.nair]

hi,

starting to create a pcb for my 16f887 project but dont understand why the chips has two vss pins and two vdd pins do I need to connect both or will one set be ok to connect ???

Thanks brett

hi, Good ques. During the run time of uC it may consume varying amount of current so voltage gradients may appear inside the chip. That may cause serious error inside. So if the chip is provided with multiple VCC's and GND's it can achieve maximum performance and stability.

[westonbrett]

Tidy answer thanks for making it clear cheers so much

[Sparky1039]

Having worked in the chip fabrication industry I'll offer a more concise explanation.

During the design and fabrication of the microcontroller there are 100's of thousands or millions of MOSFET transistors that need connections, many of which are to VCC/VDD and VSS. All connections rely on several metallization layers for this interconnection arrangement. To design single point VCC/Vdd and grounds in this metallization step would further complicate an already difficult and complicated process. Hence it's simpler to design the chip with multiple VCC/VDD and ground points. Plus it's not economical with single point because additional metallization masks would be required (very expen$ive) as well as additional manufacturing steps to include these layers with the extra routing. One way to visualize this concept is comparing the cost and complexity of 2 vs. 4-layer PC board design and fab.

In the case of high speed processors (like Intel or AMD's) it becomes prohibitive to do this because of the current density found at a single point connection. An Intel processor operating at a few GHz's can draw amps worth of switching current which is more than most chip bond wires can safely handle.

In this case as well as with a PIC it's better to have several VCC/VDD and VSS points to minimize the I2R losses when switching currents both internally and on the I/O ports. High I2R losses can cause a significant drop in working voltages which if connected to high speed I/O ports or internal signal buses can create unpredictable results. This can be seen as insufficient switching levels (voltage droop) that fail to cross the Hi/Lo thresholds of the peripheral device. By having multiple VCC/VDD or ground points these losses are spread out lowering this effect (like resistors in parallel).

So when designing any PIC or other microcontroller product it's very important to have all these points connected with a solid low resistance connection (fat traces or plane layers) with lots of decoupling caps nearby.

[vipin.p.nair]

Tidy answer thanks for making it clear cheers so much

welcome

[westonbrett]

Thanks a lot now I almost don't mind the extra work for the extra traces required , thanks sparky