First impressions of Beta 7.3.0

[janni]

I admit, I had a weak hope for some IDE improvement but not much has changed. For some reason running the IDE still hurts my eyes with full screen flash (see the little eyes here ?), removing packages that are useful for minority (FT8xx) takes a lot of time, user libraries functions are barely visible in Library Manager (thin light-gray letters), and alphabetic listing of libraries' functions destroys any planned order thus making work with large libraries an unnecessary torment.

On the positive side, restoring packages backed-up before installing new version works perfectly with just one button-press in Library Manager (well, it could also automatically refresh the listing afterwards, so it would not have to be done manually ).

Returning to the main goal of this version, i.e. implementation of K42 and K83 processors, first impressions are mixed. Long range MOVFFL instructions are used much more reasonably (and software simulator recognizes them ). On the other hand, one of basic problems - difference in SFRs placement between the new and older PIC18s - was apparently not easy to overcome and developers have taken quick-and-dirty approach by duplicating all main libraries for the new processors (instead of changing SFR addresses while linking). As information about processor for which library was compiled is encoded in mcl file, it's possible to recognize the necessity and remapping the few crucial SFRs should not be that hard, but maybe there were other hard to pass obstacles.

As it is, one obviously cannot use old libraries with K42 and K83 processors, like libraries on Libstock that do not have sources available. A lot of complains may be expected from those that do not know about the incompatibility as compiler does not protest when linking older libraries.

If the linking problem is impassable, maybe more reasonable solution would be to call the K42 & K83 families (and any new similar ones) 'enhanced PIC18' processors and, like with PIC16 enhanced families, place a separate set of libraries (which is already a fact) in a separate Uses folder (like P18_Enh), add appropriate predefined compiler definition to allow recognizing new processors during compilation, and stop pretending that compiler treats them like the older ones.

[rus51]

Hi

I agree with Janni. The IDE was previously a piece of junk and it still is a piece of junk in version 7.3.0.

However, of more concern to me is the fact that there are problems with the P18F27K40.c register definition file (in the defs folder). Once again I have had to add information to it to make it usable for me. As it comes, many register bits in the TX1STA, RC1STA,TX2STA and RC2STA registers are not defined. There may be more errors with other registers in this c file and also with the def c files for other pics but as yet I only know of these because they just broke a programme of mine when I tried to compile it.
See below.

rus51

Code: Select all

sfr unsigned short volatile RC2STA           absolute 0xE9D;
////////////////////////////////////////////////////////////////
   //these are mE. I commented these out
   
//    const register unsigned short int RCD82 = 0;
//    sbit  RCD82_bit at RC2STA.B0;
//    const register unsigned short int CREN2 = 4;
//    sbit  CREN2_bit at RC2STA.B4;
//    const register unsigned short int RC8_92 = 6;
//    sbit  RC8_92_bit at RC2STA.B6;
//    const register unsigned short int RC92 = 6;
//    sbit  RC92_bit at RC2STA.B6;
//////////////////////////////////////////////////////////////////
    //I added these lines
    const register unsigned short int RX9D2 = 0;
    sbit  RX9D2_bit at RC2STA.B0;
    const register unsigned short int OERR2 = 1;
    sbit  OERR2_bit at RC2STA.B1;
    const register unsigned short int FERR2 = 2;
    sbit  FERR2_bit at RC2STA.B2;
    const register unsigned short int ADDEN2 = 3;
    sbit  ADDEN2_bit at RC2STA.B3;
    const register unsigned short int CREN2 = 4;
    sbit  CREN2_bit at RC2STA.B4;
    const register unsigned short int SREN2 = 5;
    sbit  SREN2_bit at RC2STA.B5;
    const register unsigned short int RX92 = 6;
    sbit  RX92_bit at RC2STA.B6;
    const register unsigned short int SPEN2 = 7;
    sbit  SPREN2 at RC2STA.B7;
////////////////////////////////////////////////////////
sfr unsigned short volatile RCSTA2           absolute 0xE9D;
sfr unsigned short volatile TX2STA           absolute 0xE9E;
//////////////////////////////////////////////////////
 //    these are mE. I commented these out
     
 //   const register unsigned short int TXD82 = 0;
 //   sbit  TXD82_bit at TX2STA.B0;
 //   const register unsigned short int TRMT = 1;
 //   sbit  TRMT2_bit at TX2STA.B1;
 //   const register unsigned short int TX8_92 = 6;
 //   sbit  TX8_92_bit at TX2STA.B6;
////////////////////////////////////////////////////

    //I added these lines
    const register unsigned short int TX9D2 = 0;
    sbit  TX9D2_bit at TX2STA.B0;
    const register unsigned short int TRMT2 = 1;
    sbit  TRMT2_bit at TX2STA.B1;
    const register unsigned short int BRGH = 2;	  //this is necessary or it breaks mE UARTx_Remappable_Init function
    const register unsigned short int BRGH2 = 2;
    sbit  BRGH2_bit at TX2STA.B2;
    const register unsigned short int SENDB2 = 3;
    sbit  SENDB2_bit at TX2STA.B3;
    const register unsigned short int SYNC2 = 4;
    sbit  SYNC2_bit at TX2STA.B4;
    const register unsigned short int TXEN2 = 5;
    sbit  TXEN2_bit at TX2STA.B5;
    const register unsigned short int TX92 = 6;
    sbit  TX92_bit at TX2STA.B6;
    const register unsigned short int CSRC2 = 7;
    sbit  CSRC2_bit at TX2STA.B7;
////////////////////////////////////////////////////////
sfr unsigned short volatile TXSTA2           absolute 0xE9E;

.............
.............

sfr unsigned short volatile RC1STA           absolute 0xF9D;
/////////////////////////////////////////
    //These are the original mE RC1STA lines. I commented these out
    //const register unsigned short int RCD8 = 0;
    //sbit  RCD8_bit at RC1STA.B0;
    //sbit  CREN_RC1STA_bit at RC1STA.B4;
    //const register unsigned short int RC8_9 = 6;
    //sbit  RC8_9_bit at RC1STA.B6;
    //const register unsigned short int RC9 = 6;
    //sbit  RC9_bit at RC1STA.B6;
//////////////////////////////////////////////
/////////////////////////////////////////////////////////////
    //I added these lines
    const register unsigned short int RX9D1 = 0;
    sbit  RX9D1_bit at RC1STA.B0;
    const register unsigned short int OERR1 = 1;
    sbit  OERR1_bit at RC1STA.B1;
    const register unsigned short int FERR1 = 2;
    sbit  FERR1_bit at RC1STA.B2;
    const register unsigned short int ADDEN1 = 3;
    sbit  ADDEN1_bit at RC1STA.B3;
    const register unsigned short int CREN1 = 4;
    sbit  CREN1_bit at RC1STA.B4;
    const register unsigned short int SREN1 = 5;
    sbit  SREN1_bit at RC1STA.B5;
    const register unsigned short int RX91 = 6;
    sbit  RX91_bit at RC1STA.B6;
    const register unsigned short int SPEN1 = 7;
    sbit  SPREN1 at RC1STA.B7;
////////////////////////////////////////////////////////
sfr unsigned short volatile RCSTA1           absolute 0xF9D;

sfr unsigned short volatile TXSTA            absolute 0xF9E;
sfr unsigned short volatile TX1STA           absolute 0xF9E;
/////////////////////////////////////////
    //These are the original mE TX1STA lines. I commented these out
    //const register unsigned short int TXD8 = 0;
    //sbit  TXD8_bit at TX1STA.B0;
    //sbit  TRMT_TX1STA_bit at TX1STA.B1;
    //const register unsigned short int BRGH = 2;
    //sbit  BRGH_bit at TX1STA.B2;
    //const register unsigned short int TX8_9 = 6;
    //sbit  TX8_9_bit at TX1STA.B6;
//////////////////////////////////////////////
/////////////////////////////////////////////////////////////
    //I added these lines
    const register unsigned short int TX9D1 = 0;
    sbit  TX9D1_bit at TX1STA.B0;
    const register unsigned short int TRMT1 = 1;
    sbit  TRMT1_bit at TX1STA.B1;
    const register unsigned short int BRGH1 = 2;
    sbit  BRGH1_bit at TX1STA.B2;
    const register unsigned short int SENDB1 = 3;
    sbit  SENDB1_bit at TX1STA.B3;
    const register unsigned short int SYNC1 = 4;
    sbit  SYNC1_bit at TX1STA.B4;
    const register unsigned short int TXEN1 = 5;
    sbit  TXEN1_bit at TX1STA.B5;
    const register unsigned short int TX91 = 6;
    sbit  TX91_bit at TX1STA.B6;
    const register unsigned short int CSRC1 = 7;
    sbit  CSRC1_bit at TX1STA.B7;
////////////////////////////////////////////////////////
sfr unsigned short volatile TXSTA1           absolute 0xF9E;

[rajkovic]

As information about processor for which library was compiled is encoded in mcl file, it's possible to recognize the necessity and remapping the few crucial SFRs should not be that hard, but maybe there were other hard to pass obstacles.

As it is, one obviously cannot use old libraries with K42 and K83 processors, like libraries on Libstock that do not have sources available. A lot of complains may be expected from those that do not know about the incompatibility as compiler does not protest when linking older libraries.

If the linking problem is impassable, maybe more reasonable solution would be to call the K42 & K83 families (and any new similar ones) 'enhanced PIC18' processors and, like with PIC16 enhanced families, place a separate set of libraries (which is already a fact) in a separate Uses folder (like P18_Enh), add appropriate predefined compiler definition to allow recognizing new processors during compilation, and stop pretending that compiler treats them like the older ones.

This was hard decision to make, we decided to go to safe path. Main problem with remapping registers and usage of old mcl arises from some corner case usage scenario where
absolute address of some special function register was hard-coded in code-generator (yes it is bad practice, but it is done many years ago...).
So although remapping symbols in libraries would be easy for linker, it may happen that we miss some of this instruction with absolute address of register.
This would yield to that old libraries code that has some instance of this instructions would compile and would not work, and some would. We are revisiting algorithms and trying to find out
could we possibly cover all caveats, so we still have one *.emcl library for all P18 where it is feasible. We decided for this approach with new *.mcl just to be sure that BETA is out there for testing
in reasonable time with safest approach since we already has been very late and had situation of non-working for this MCU family.

[janni]

Yeah, I suspected something like this. History tends to bite back whenever opportunity arises . But this way we won't be able to help you catch those overlooked instructions.

Please change the color of user libraries functions in Library Manager to something better visible. And please, please introduce an option to block alphabetic listing of libraries' functions.