CC2510F32 (TI) SUPPORT (MP8051PRO v2.20)

[matrix]

Hello, I want to share my support for Texas Instruments CC2510Fxx chips.

Most of ME libraries are added, not all tested, but I think added should work. The CC2510 core have cache and pre-fetch of instructions, so they are executed for a different time each time. This is bad for INLINE Compiler Delays, but if we disable cache (MEMCTR.CACHDIS := 1;) it's OK. But this slows the performance of MCU at all - I think about 20-30%. And... for proper delay time generation you should use doubled frequency for project (if MCU is @26 MHz, use 52 MHz).

Just copy the following files into DEFS directory.

CC2510F32.mpas

Code: Select all

unit CC2510F32;  //Last Modification -> 07-Jul-2010

var R0: byte; absolute 0x00;volatile; rx;
    R1: byte; absolute 0x01;volatile; rx;
    R2: byte; absolute 0x02;volatile; rx;
    R3: byte; absolute 0x03;volatile; rx;
    R4: byte; absolute 0x04;volatile; rx;
    R5: byte; absolute 0x05;volatile; rx;
    R6: byte; absolute 0x06;volatile; rx;
    R7: byte; absolute 0x07;volatile; rx;

const F1 = 1;
const F2 = 2;
const F3 = 3;
const F4 = 4;
const F5 = 5;
const F6 = 6;
const F7 = 7;

const B0 = 0;
const B1 = 1;
const B2 = 2;
const B3 = 3;
const B4 = 4;
const B5 = 5;
const B6 = 6;
const B7 = 7;

const __FOSC_PER_CYC = 5; //__FOSC_PER_CYC should be 5, if used with Atmel
                          //Delay generator, the MCU speed should be multi-
                          //plied by 2
                          //If used with SILABS Delay generator -
                          //__FOSC_PER_CYC should be 33 and the MCU
                          //speed multiplied by 20
                          //For both, for proper delay generation cache
                          //should be disabled: MEMCTR.CACHDIS := 1;

(*--------------------------------------------------
Byte Registers
Note: Only Registers located on addresses that
are evenly divisible by 8 are bit addressable.
All other registers use bit masks.

//FOR PROPER COMPILE SP, DPL, DPH and ACC are NEEDED
//TO BE DEFINED EXACTLY LIKE IN THIS COMMENT!!!
//The Compiler Uses DPL & DPH Instead of DPL0 & DPH0
---------------------------------------------------*)



var
  DPL    : byte; absolute 0x82; volatile; sfr;   (* Data Pointer Low Byte *)
  DPH    : byte; absolute 0x83; volatile; sfr;   (* Data Pointer High Byte *)
  PSW    : byte; absolute 0xD0; volatile; sfr; bdata;
  ACC    : byte; absolute 0xE0; volatile; sfr; bdata;
  B      : byte; absolute 0xF0; volatile; sfr; bdata;
  
  P0     : byte; absolute 0x80; volatile; sfr; bdata;
  SP     : byte; absolute 0x81; volatile; sfr;
  DPL0   : byte; absolute 0x82; volatile; sfr;
  DPH0   : byte; absolute 0x83; volatile; sfr;
  DPL1   : byte; absolute 0x84; volatile; sfr;
  DPH1   : byte; absolute 0x85; volatile; sfr;
  U0CSR  : byte; absolute 0x86; volatile; sfr;
  PCON   : byte; absolute 0x87; volatile; sfr;
  TCON   : byte; absolute 0x88; volatile; sfr; bdata;
  P0IFG  : byte; absolute 0x89; volatile; sfr;
  P1IFG  : byte; absolute 0x8A; volatile; sfr;
  P2IFG  : byte; absolute 0x8B; volatile; sfr;
  PICTL  : byte; absolute 0x8C; volatile; sfr;
  P1IEN  : byte; absolute 0x8D; volatile; sfr;
  P0INP  : byte; absolute 0x8F; volatile; sfr;

  P1       : byte; absolute 0x90; volatile; sfr; bdata;
  RFIM     : byte; absolute 0x91; volatile; sfr;
  DPS      : byte; absolute 0x92; volatile; sfr;
  MPAGE    : byte; absolute 0x93; volatile; sfr;
  S0CON    : byte; absolute 0x98; volatile; sfr; bdata;
  IEN2     : byte; absolute 0x9A; volatile; sfr;
  S1CON    : byte; absolute 0x9B; volatile; sfr;
  T2CT     : byte; absolute 0x9C; volatile; sfr;
  T2PR     : byte; absolute 0x9D; volatile; sfr;
  T2CTL    : byte; absolute 0x9E; volatile; sfr;
  
  P2       : byte; absolute 0xA0; volatile; sfr; bdata;
  WORIRQ   : byte; absolute 0xA1; volatile; sfr;
  WORCTL   : byte; absolute 0xA2; volatile; sfr;
  WOREVT0  : byte; absolute 0xA3; volatile; sfr;
  WOREVT1  : byte; absolute 0xA4; volatile; sfr;
  WORTIME0 : byte; absolute 0xA5; volatile; sfr;
  WORTIME1 : byte; absolute 0xA6; volatile; sfr;
  IEN0     : byte; absolute 0xA8; volatile; sfr; bdata;
  IP2      : byte; absolute 0xA9; volatile; sfr;
  FWT      : byte; absolute 0xAB; volatile; sfr;
  FADDRL   : byte; absolute 0xAC; volatile; sfr;
  FADDRH   : byte; absolute 0xAD; volatile; sfr;
  FCTL     : byte; absolute 0xAE; volatile; sfr;
  FWDATA   : byte; absolute 0xAF; volatile; sfr;
  

  ENCDI    : byte; absolute 0xB1; volatile; sfr;
  ENCDO    : byte; absolute 0xB2; volatile; sfr;
  ENCCS    : byte; absolute 0xB3; volatile; sfr;
  ADCCON1  : byte; absolute 0xB4; volatile; sfr;
const
  EOC      = 7; //End Of Conversion
  ST       = 6; //Start Conversion
var
  ADCCON2  : byte; absolute 0xB5; volatile; sfr;
  ADCCON3  : byte; absolute 0xB6; volatile; sfr;
  IEN1     : byte; absolute 0xB8; volatile; sfr; bdata;
  IP1      : byte; absolute 0xB9; volatile; sfr;
  ADCL     : byte; absolute 0xBA; volatile; sfr;
  ADCH     : byte; absolute 0xBB; volatile; sfr;
  RNDL     : byte; absolute 0xBC; volatile; sfr;
  RNDH     : byte; absolute 0xBD; volatile; sfr;
  SLEEP    : byte; absolute 0xBE; volatile; sfr;



  IRCON    : byte; absolute 0xC0; volatile; sfr; bdata;
  U0DBUF   : byte; absolute 0xC1; volatile; sfr;
  U0BAUD   : byte; absolute 0xC2; volatile; sfr;
  U0UCR    : byte; absolute 0xC4; volatile; sfr;
  U0GCR    : byte; absolute 0xC5; volatile; sfr;
  CLKCON   : byte; absolute 0xC6; volatile; sfr;
  MEMCTR   : byte; absolute 0xC7; volatile; sfr;
const
  CACHDIS  = 1;
  PREFDIS  = 0;
var
  WDCTL    : byte; absolute 0xC9; volatile; sfr;
  T3CNT    : byte; absolute 0xCA; volatile; sfr;
  T3CTL    : byte; absolute 0xCB; volatile; sfr;
  T3CCTL0  : byte; absolute 0xCC; volatile; sfr;
  T3CC0    : byte; absolute 0xCD; volatile; sfr;
  T3CCTL1  : byte; absolute 0xCE; volatile; sfr;
  T3CC1    : byte; absolute 0xCF; volatile; sfr;


  DMAIRQ   : byte; absolute 0xD1; volatile; sfr;
  DMA1CFGL : byte; absolute 0xD2; volatile; sfr;
  DMA1CFGH : byte; absolute 0xD3; volatile; sfr;
  DMA0CFGL : byte; absolute 0xD4; volatile; sfr;
  DMA0CFGH : byte; absolute 0xD5; volatile; sfr;
  DMAARM   : byte; absolute 0xD6; volatile; sfr;
  DMAREQ   : byte; absolute 0xD7; volatile; sfr;
  TIMIF    : byte; absolute 0xD8; volatile; sfr; bdata;
  RFD      : byte; absolute 0xD9; volatile; sfr;
  T1CC0H   : byte; absolute 0xDB; volatile; sfr;
  T1CC0L   : byte; absolute 0xDA; volatile; sfr;
  T1CC1H   : byte; absolute 0xDD; volatile; sfr;
  T1CC1L   : byte; absolute 0xDC; volatile; sfr;
  T1CC2H   : byte; absolute 0xDF; volatile; sfr;
  T1CC2L   : byte; absolute 0xDE; volatile; sfr;
  
  RFST     : byte; absolute 0xE1; volatile; sfr;
const
  SFSTXON  = $00;
  SCAL     = $01;
  SRX      = $02;
  STX      = $03;
  SIDLE    = $04;
  SAFC     = $05;
  SNOP     = $06;
var
  T1CNTL   : byte; absolute 0xE2; volatile; sfr;
  T1CNTH   : byte; absolute 0xE3; volatile; sfr;
  T1CTL    : byte; absolute 0xE4; volatile; sfr;
  T1CTL0   : byte; absolute 0xE5; volatile; sfr;
  T1CCTL1  : byte; absolute 0xE6; volatile; sfr;
  T1CCTL2  : byte; absolute 0xE7; volatile; sfr;
  IRCON2   : byte; absolute 0xE8; volatile; sfr; bdata;
  RFIF     : byte; absolute 0xE9; volatile; sfr;
  T4CNT    : byte; absolute 0xEA; volatile; sfr;
  T4CTL    : byte; absolute 0xEB; volatile; sfr;
  T4CCTL0  : byte; absolute 0xEC; volatile; sfr;
  T4CC0    : byte; absolute 0xED; volatile; sfr;
  T4CCTL1  : byte; absolute 0xEE; volatile; sfr;
  T4CC1    : byte; absolute 0xEF; volatile; sfr;
  
var
  PERCFG   : byte; absolute 0xF1; volatile; sfr;
const
  //7 - not used
  T1CFG    = 6;
  T3CFG    = 5;
  T4CFG    = 4;
  //3 - not used
  //2 - not used
  U1CFG    = 1;
  U0CFG    = 0;
var
  ADCCFG   : byte; absolute 0xF2; volatile; sfr;
  P0SEL    : byte; absolute 0xF3; volatile; sfr;
  P1SEL    : byte; absolute 0xF4; volatile; sfr;
  P2SEL    : byte; absolute 0xF5; volatile; sfr;
  P1INP    : byte; absolute 0xF6; volatile; sfr;
  P2INP    : byte; absolute 0xF7; volatile; sfr;
  U1CSR    : byte; absolute 0xF8; volatile; sfr; bdata;
  U1UCR    : byte; absolute 0xFB; volatile; sfr;
  U1GCR    : byte; absolute 0xFC; volatile; sfr;
  U1DBUF   : byte; absolute 0xF9; volatile; sfr;
  U1BAUD   : byte; absolute 0xFA; volatile; sfr;
  P0DIR    : byte; absolute 0xFD; volatile; sfr;
  P1DIR    : byte; absolute 0xFE; volatile; sfr;
  P2DIR    : byte; absolute 0xFF; volatile; sfr;
  
(* ------------------------------------------------------------------------------------------------
 *                            Xdata Radio Registers
 * ------------------------------------------------------------------------------------------------
 *)
var  SYNC1       : byte; absolute 0xDF00; xdata; //  Sync word, high byte                                */
var  SYNC0       : byte; absolute 0xDF01; xdata; //  Sync word, low byte                                 */
var  PKTLEN      : byte; absolute 0xDF02; xdata; //  Packet length                                       */
var  PKTCTRL1    : byte; absolute 0xDF03; xdata; //  Packet automation control                           */
const
     PQT2          = 7;
     PQT1          = 6;
     PQT0          = 5;
     //4
     //3
     APPEND_STATUS = 2;
     ADR_CHK1      = 1;
     ADR_CHK       = 0;
var  PKTCTRL0    : byte; absolute 0xDF04; xdata; //  Packet automation control                           */
const
     //7
     WHITE_DATA    = 6;
     PKT_FORMAT1   = 5;
     PKT_FORMAT0   = 4;
     CC2400_EN     = 3;
     CRC_EN        = 2;
     LENGTH_CONFIG1 = 1;
     LENGTH_CONGIF0 = 0;
var  ADDR        : byte; absolute 0xDF05; xdata; //  Device address                                      */
var  CHANNR      : byte; absolute 0xDF06; xdata; //  Channel number                                      */
var  FSCTRL1     : byte; absolute 0xDF07; xdata; //  Frequency synthesizer control                       */
var  FSCTRL0     : byte; absolute 0xDF08; xdata; //  Frequency synthesizer control                       */
var  FREQ2       : byte; absolute 0xDF09; xdata; //  Frequency control word, high byte                   */
var  FREQ1       : byte; absolute 0xDF0A; xdata; //  Frequency control word, middle byte                 */
var  FREQ0       : byte; absolute 0xDF0B; xdata; //  Frequency control word, low byte                    */
var  MDMCFG4     : byte; absolute 0xDF0C; xdata; //  Modem configuration                                 */
var  MDMCFG3     : byte; absolute 0xDF0D; xdata; //  Modem configuration                                 */
var  MDMCFG2     : byte; absolute 0xDF0E; xdata; //  Modem configuration                                 */
const
     DEM_DCFILT_OFF = 7; //Disable digital DC blocking filter before demodulator.
     MOD_FORMAT_2FSK = $00;
     MOD_FORMAT_GFSK = $10;
     MOD_FORMAT_OOK  = $30;
     MOD_FORMAT_MSK  = $70;
     MANCHESTER_EN   = 3;
     SYNC_MODE2      = 2;
     SYNC_MODE1      = 1;
     SYNC_MODE0      = 0;
var  MDMCFG1     : byte; absolute 0xDF0F; xdata; //  Modem configuration                                 */
var  MDMCFG0     : byte; absolute 0xDF10; xdata; //  Modem configuration                                 */
var  DEVIATN     : byte; absolute 0xDF11; xdata; //  Modem deviation setting                             */
var  MCSM2       : byte; absolute 0xDF12; xdata; //  Main Radio Control State Machine configuration      */
var  MCSM1       : byte; absolute 0xDF13; xdata; //  Main Radio Control State Machine configuration      */
var  MCSM0       : byte; absolute 0xDF14; xdata; //  Main Radio Control State Machine configuration      */
var  FOCCFG      : byte; absolute 0xDF15; xdata; //  Frequency Offset Compensation configuration         */
var  BSCFG       : byte; absolute 0xDF16; xdata; //  Bit Synchronization configuration                   */
var  AGCCTRL2    : byte; absolute 0xDF17; xdata; //  AGC control                                         */
var  AGCCTRL1    : byte; absolute 0xDF18; xdata; //  AGC control                                         */
var  AGCCTRL0    : byte; absolute 0xDF19; xdata; //  AGC control                                         */
var  FREND1      : byte; absolute 0xDF1A; xdata; //  Front end RX configuration                          */
var  FREND0      : byte; absolute 0xDF1B; xdata; //  Front end TXconfiguration                          */
var  FSCAL3      : byte; absolute 0xDF1C; xdata; //  Frequency synthesizer calibration                   */
var  FSCAL2      : byte; absolute 0xDF1D; xdata; //  Frequency synthesizer calibration                   */
var  FSCAL1      : byte; absolute 0xDF1E; xdata; //  Frequency synthesizer calibration                   */
var  FSCAL0      : byte; absolute 0xDF1F; xdata; //  Frequency synthesizer calibration                   */
var  FSTEST      : byte; absolute 0xDF20; xdata; //  Frequency synthesizer calibration control           */
var  PTEST       : byte; absolute 0xDF21; xdata; //  Production test                                     */
var  AGCTEST     : byte; absolute 0xDF22; xdata; //  AGC test                                            */
var  TEST2       : byte; absolute 0xDF23; xdata; //  Various test settings                               */
var  TEST1       : byte; absolute 0xDF24; xdata; //  Various test settings                               */
var  TEST0       : byte; absolute 0xDF25; xdata; //  Various test settings                               */
var  _XREGDF26   : byte; absolute 0xDF26; xdata; //  reserved                                            */
var  PA_TABLE7   : byte; absolute 0xDF27; xdata; //  reserved                                            */
var  PA_TABLE6   : byte; absolute 0xDF28; xdata; //  reserved                                            */
var  PA_TABLE5   : byte; absolute 0xDF29; xdata; //  reserved                                            */
var  PA_TABLE4   : byte; absolute 0xDF2A; xdata; //  reserved                                            */
var  PA_TABLE3   : byte; absolute 0xDF2B; xdata; //  reserved                                            */
var  PA_TABLE2   : byte; absolute 0xDF2C; xdata; //  reserved                                            */
var  PA_TABLE1   : byte; absolute 0xDF2D; xdata; //  reserved                                            */
var  PA_TABLE0   : byte; absolute 0xDF2E; xdata; //  PA output power setting                             */
const
     OP_1dbm     = $FF;
     OP_0dbm     = $FB;
     OP_m2dbm    = $BF;
var  IOCFG2      : byte; absolute 0xDF2F; xdata; //  Radio Test Signal Configuration (P1_7)              */
var  IOCFG1      : byte; absolute 0xDF30; xdata; //  Radio Test Signal Configuration (P1_6)              */
var  IOCFG0      : byte; absolute 0xDF31; xdata; //  Radio Test Signal Configuration (P1_5)              */
var  _XREGDF32   : byte; absolute 0xDF32; xdata; //  reserved                                            */
var  _XREGDF33   : byte; absolute 0xDF33; xdata; //  reserved                                            */
var  _XREGDF34   : byte; absolute 0xDF34; xdata; //  reserved                                            */
var  _XREGDF35   : byte; absolute 0xDF35; xdata; //  reserved                                            */
var  PARTNUM     : byte; absolute 0xDF36; xdata; //  Chip ID [15:8]                                      */
var  VERSION     : byte; absolute 0xDF37; xdata; //  Chip ID [7:0]                                       */
var  FREQEST     : byte; absolute 0xDF38; xdata; //  Frequency Offset Estimate                           */
var  LQI         : byte; absolute 0xDF39; xdata; //  Link Quality Indicator                              */
const
     CRC_OK      = 7;
var  RSSI        : byte; absolute 0xDF3A; xdata; //  Received Signal Strength Indication                 */
var  MARCSTATE   : byte; absolute 0xDF3B; xdata; //  Main Radio Control State                            */
const
     mrcs_SLEEP          = $00;
     mrcs_IDLE           = $01;
     mrcs_XOFF           = $02;
     mrcs_VCOON_MC       = $03;
     mrcs_REGON_MC       = $04;
     mrcs_MANCAL         = $05;
     mrcs_VCOON          = $06;
     mrcs_REGON          = $07;
     mrcs_STARTCAL       = $08;
     mrcs_BWBOOST        = $09;
     mrcs_FS_LOCK        = $0A;
     mrcs_IFADCON        = $0B;
     mrcs_ENDCAL         = $0C;
     mrcs_RX             = $0D;
     mrcs_RX_END         = $0E;
     mrcs_RX_RST         = $0F;
     mrcs_TXRX_SWITCH    = $10;
     mrcs_RX_OVERFLOW    = $11;
     mrcs_FSTXON         = $12;
     mrcs_TX             = $13;
     mrcs_TX_END         = $14;
     mrcs_RXTX_SWITCH    = $15;
     mrcs_TX_UNDERFLOW   = $16;
var  PKTSTATUS   : byte; absolute 0xDF3C; xdata; //  Packet status                                       */
const
     pkt_CRC_OK      = 7;
     CS              = 6;
     PQT_REACHED     = 5;
     CCA             = 4;
     SFD             = 3;
var  VCO_VC_DAC  : byte; absolute 0xDF3D; xdata; //  PLL calibration current                             */
var  DUMMY1      : byte; absolute 0xDF3E; xdata; //  DUMMY#1
var  DUMMY2      : byte; absolute 0xDF3F; xdata; //  DUMMY#2

var  I2SCFG0     : byte; absolute 0xDF40; xdata;
var  I2SCFG1     : byte; absolute 0xDF41; xdata;
var  I2SDATL     : byte; absolute 0xDF42; xdata;
var  I2SDATH     : byte; absolute 0xDF43; xdata;
var  I2SWCNT     : byte; absolute 0xDF44; xdata;
var  I2SSTAT     : byte; absolute 0xDF45; xdata;
var  I2SCLKF0    : byte; absolute 0xDF46; xdata;
var  I2SCLKF1    : byte; absolute 0xDF47; xdata;
var  I2SCLKF2    : byte; absolute 0xDF48; xdata;





(*------------------------------------------------
   Bit Variable Definitions
------------------------------------------------*)
(*------------------------------------------------
P0 (0x80) Bit Registers
------------------------------------------------*)
var P0_0_bit : sbit at P0.B0; sfr;
    P0_1_bit : sbit at P0.B1; sfr;
    P0_2_bit : sbit at P0.B2; sfr;
    P0_3_bit : sbit at P0.B3; sfr;
    P0_4_bit : sbit at P0.B4; sfr;
    P0_5_bit : sbit at P0.B5; sfr;
    P0_6_bit : sbit at P0.B6; sfr;
    P0_7_bit : sbit at P0.B7; sfr;

(*------------------------------------------------
TCON (0x88) Bit Registers
------------------------------------------------*)

var IT0_bit      : sbit at TCON.B0; sfr;       // reserved
    RFTXRXIF_bit : sbit at TCON.B1; sfr;       // RF TX/RX complete interrupt flag
    IT1_bit      : sbit at TCON.B2; sfr;       // reserved
    URX0IF_bit   : sbit at TCON.B3; sfr;       // USART0 RX interrupt flag
    //TCON_4_bit : sbit at TCON.B4; sfr;       // not used
    ADCIF_bit    : sbit at TCON.B5; sfr;       // ADC interrupt flag
    //TCON_6_bit : sbit at TCON.B6; sfr;       // not used
    URX1IF_bit   : sbit at TCON.B7; sfr;       // USART1 RX interrupt flag
    
const
  IT0         = 0;
  RFTXRXIF    = 1;
  IT1         = 2;
  URX0IF      = 3;
  TCON_4      = 4;
  ADCIF       = 5;
  TCON_6      = 6;
  URX1IF      = 7;

(*------------------------------------------------
P1 (0x90) Bit Registers
------------------------------------------------*)

var P1_0_bit : sbit at P1.B0; bdata; sfr;
    P1_1_bit : sbit at P1.B1; sfr;
    P1_2_bit : sbit at P1.B2; sfr;
    P1_3_bit : sbit at P1.B3; sfr;
    P1_4_bit : sbit at P1.B4; sfr;
    P1_5_bit : sbit at P1.B5; sfr;
    P1_6_bit : sbit at P1.B6; sfr;
    P1_7_bit : sbit at P1.B7; sfr;

    T2 : sbit  at P1.B0; sfr;       // External input to Timer/Counter 2, clock out
    T2EX : sbit at P1.B1; sfr;       // Timer/Counter 2 capture/reload trigger & dir ctl

    SS : sbit  at P1.B4; sfr;       // SPI: SS - Slave port select input
    MOSI : sbit at P1.B5; sfr;       // SPI: MOSI - Master data output, slave data input
    MISO : sbit at P1.B6; sfr;       // SPI: MISO - Master data input, slave data output
    SCK : sbit at P1.B7; sfr;       // SPI: SCK - Master clock output, slave clock input
    
//------------------------------------------------
//SCON (0x98) Bit Registers
//------------------------------------------------
var ENCIF_0_bit : sbit  at S0CON.B0; sfr;       // AES interrupt
    ENCIF_1_bit : sbit  at S0CON.B1; sfr;       // AES interrupt


//------------------------------------------------
//P2 (0xA0) Bit Registers
//------------------------------------------------
var P2_0 : sbit at P2.B0; sfr;
    P2_1 : sbit at P2.B1; sfr;
    P2_2 : sbit at P2.B2; sfr;
    P2_3 : sbit at P2.B3; sfr;
    P2_4 : sbit at P2.B4; sfr;
    P2_5 : sbit at P2.B5; sfr;
    P2_6 : sbit at P2.B6; sfr;
    P2_7 : sbit at P2.B7; sfr;

//------------------------------------------------
//IE (0xA8) Bit Registers
//------------------------------------------------
var RFTXRXIE_bit : sbit  at IEN0.B0; sfr;       // RF Tx/Rx Done Interrupt Enable: 1=Enabled
    ADCIE_bit    : sbit  at IEN0.B1; sfr;       // ADC Interrupt Enable: 1=Enabled
    URX0IE_bit   : sbit  at IEN0.B2; sfr;       // USART 0 Rx Interrupt Enable: 1=Enabled
    URX1IE_bit   : sbit  at IEN0.B3; sfr;       // USART 1 Rx Interrupt Enable: 1=Enabled
    ENCIE_bit    : sbit  at IEN0.B4; sfr;       // AES enc/dec Interrupt Enable: 1=Enabled
    STIE_bit     : sbit  at IEN0.B5; sfr;       // Sleep Timer Interrupt Enable: 1=Enabled

    EA_bit       : sbit  at IEN0.B7; sfr;       // Global Interrupt Enable: 0=Disable all interrupts
    
const
  RFTXRXIE  = 0;
  ADCIE     = 1;
  URX0IE    = 2;
  URX1IE    = 3;
  ENCIE     = 4;
  STIE      = 5;
  EA        = 7;

//------------------------------------------------
//IEN1 (0xB8) Bit Registers
//------------------------------------------------
var DMAIE_bit : sbit  at IEN1.B0; sfr;        // DMA Interrupt Enable
    T1IE_bit  : sbit  at IEN1.B1; sfr;        // Timer 1 Interrupt Enable
    T2IE_bit  : sbit  at IEN1.B2; sfr;        // Timer 2 Interrupt Enable
    T3IE_bit  : sbit  at IEN1.B3; sfr;        // Timer 3 Interrupt Enable
    T4IE_bit  : sbit  at IEN1.B4; sfr;        // Timer 4 Interrupt Enable
    P0IE_bit  : sbit  at IEN1.B5; sfr;        // Port 0 Interrupt Enable
    
const
  DMAIE = 0;
  T1IE  = 1;
  T2IE  = 2;
  T3IE  = 3;
  T4IE  = 4;
  P0IE  = 5;



//------------------------------------------------
//PSW (0xD0) Bit Registers
//------------------------------------------------
var P   : sbit   at PSW.B0; sfr;       // Parity Flag
    FL  : sbit   at PSW.B1; sfr;       // User Flag
    OV  : sbit   at PSW.B2; sfr;       // Overflow Flag
    RS0 : sbit   at PSW.B3; sfr;       // Register Bank Select Bit 0
    RS1 : sbit   at PSW.B4; sfr;       // Register Bank Select Bit 1
    F0  : sbit   at PSW.B5; sfr;       // User Flag 0
    AC  : sbit   at PSW.B6; sfr;       // Auxiliary Carry Flag
    CY  : sbit   at PSW.B7; sfr;       // Carry Flag



(*------------------------------------------------
PCON (0x87) Bit Values
------------------------------------------------*)
const  IDL   = 0;
//Idle mode bit
//Cleared by hardware when interrupt or reset occurs.
//Set to enter idle mode.

//T1CTL (0xE4) – Timer 1 Control and Status
const  CH2IF = 7;
const  CH1IF = 6;
const  CH0IF = 5;
const  OVFIF = 4;


(*------------------------------------------------
Interrupt Vectors:
------------------------------------------------*)
const  IV_RFTXRX         = $03;  //RF TX done / RX ready
const  IV_ADC            = $0B;  //ADC end of conversion Interrupt
const  IV_URX0           = $13;  //USART0 RX complete
const  IV_URX1           = $1B;  //USART1 RX complete
const  IV_ENC            = $23;  //AES encription/decription complete
const  IV_ST             = $2B;  //Sleep Timer compare
const  IV_P2INT          = $33;  //Port 2 Inputs Interrupt
const  IV_UTX0           = $3B;  //USART0 TX complete
const  IV_DMA            = $43;  //DMA transfer complete
const  IV_T1             = $4B;  //Timer 1 (16 bit) capture/compare/overflow
const  IV_T2             = $53;  //Timer 2 (MAC Timer) overflow
const  IV_T3             = $5B;  //Timer 3 (8 bit) capture/compare/overflow
const  IV_T4             = $63;  //Timer 4 (8 bit) capture/compare/overflow
const  IV_P0INT          = $6B;  //Port 0 Inputs Interrupt
const  IV_UTX1           = $73;  //USART1 TX complete
const  IV_P1INT          = $7B;  //Port 1 Inputs Interrupt
const  IV_RF             = $83;  //RF General Interrupts
const  IV_WDT            = $8B;  //Watchdog overflow in timer mode

implementation
end.

CC2510F32.mlk

Code: Select all

<?xml version="1.0"?>
<MCU>
        <DEVICE_NAME>CC2510F32</DEVICE_NAME>
        <ROM>
                <MIN_ADDR>0x0000</MIN_ADDR>
                <MAX_ADDR>0x7FFF</MAX_ADDR>
        </ROM>
        <RX>
                <MIN_ADDR>0x00</MIN_ADDR>
                <MAX_ADDR>0x07</MAX_ADDR>
        </RX>
        <BDATA>
                <MIN_ADDR>0x20</MIN_ADDR>
                <MAX_ADDR>0x2F</MAX_ADDR>
        </BDATA>
        <DATA>
                <MIN_ADDR>0x08</MIN_ADDR>
                <MAX_ADDR>0x1F</MAX_ADDR>
        </DATA>
        <DATA>
                <MIN_ADDR>0x30</MIN_ADDR>
                <MAX_ADDR>0x7F</MAX_ADDR>
        </DATA>
        <SFR>
                <MIN_ADDR>0x80</MIN_ADDR>
                <MAX_ADDR>0xFF</MAX_ADDR>
        </SFR>
        <IDATA>
                <MIN_ADDR>0x80</MIN_ADDR>
                <MAX_ADDR>0xFF</MAX_ADDR>
        </IDATA>
        <EXDATA>
                <MIN_ADDR>0xF000</MIN_ADDR>
                <MAX_ADDR>0xFEFF</MAX_ADDR>
        </EXDATA>
        <!-- User can setup external Ram interface by uncommenting XDATA node

  <EXDATA>
    <MIN_ADDR>0xDF40</MIN_ADDR>
    <MAX_ADDR>0xDF48</MAX_ADDR>
  </EXDATA> -->
  <XDATA>
    <MIN_ADDR>0xDF00</MIN_ADDR>
    <MAX_ADDR>0xDF48</MAX_ADDR>
  </XDATA>
        <!-- User can setup external Ram interface by uncommenting PDATA node
  <PDATA>
    <MIN_ADDR>0x00</MIN_ADDR>
    <MAX_ADDR>0x4A</MAX_ADDR>
  </PDATA>       -->
        <IVT>
                <INT>
                        <ADDRESS>0x0003</ADDRESS>
                        <NAME>RFTXRX</NAME>
                        <DESC>RF TX done / RX ready</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x000B</ADDRESS>
                        <NAME>ADC</NAME>
                        <DESC>ADC end of conversion Interrupt</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x0013</ADDRESS>
                        <NAME>URX0</NAME>
                        <DESC>USART0 RX complete</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x001B</ADDRESS>
                        <NAME>URX1</NAME>
                        <DESC>USART1 RX complete</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x0023</ADDRESS>
                        <NAME>ENC</NAME>
                        <DESC>AES encription/decription complete</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x002B</ADDRESS>
                        <NAME>ST</NAME>
                        <DESC>Sleep Timer compare</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x0033</ADDRESS>
                        <NAME>P2INT</NAME>
                        <DESC>Port 2 Inputs</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x003B</ADDRESS>
                        <NAME>UTX0</NAME>
                        <DESC>USART0 TX complete</DESC>
                </INT>
                <INT>
                  <ADDRESS>0x0043</ADDRESS>
                  <NAME>DMA</NAME>
                  <DESC>DMA transfer complete</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x004B</ADDRESS>
                        <NAME>T1</NAME>
                        <DESC>Timer 1 (16 bit) capture/compare/overflow</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x0053</ADDRESS>
                        <NAME>T2</NAME>
                        <DESC>Timer 2 (MAC Timer) overflow</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x005B</ADDRESS>
                        <NAME>T3</NAME>
                        <DESC>Timer 3 (8 bit) capture/compare/overflow</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x0063</ADDRESS>
                        <NAME>T4</NAME>
                        <DESC>Timer 4 (8 bit) capture/compare/overflow</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x006B</ADDRESS>
                        <NAME>P0INT</NAME>
                        <DESC>Port 0 Inputs Interrupt</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x0073</ADDRESS>
                        <NAME>UTX1</NAME>
                        <DESC>USART1 TX complete</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x007B</ADDRESS>
                        <NAME>P1INT</NAME>
                        <DESC>Port 1 Inputs Interrupt</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x0083</ADDRESS>
                        <NAME>RF</NAME>
                        <DESC>RF General Interrupts</DESC>
                </INT>
                <INT>
                        <ADDRESS>0x008B</ADDRESS>
                        <NAME>WDT</NAME>
                        <DESC>Watchdog overflow in timer mode</DESC>
                </INT>
        </IVT>
        <LIBRARIES>
        <LIB>
                <ALIAS>Math</ALIAS>
                <FILE>__Lib_Math</FILE>
                <TYPE>SYSTEM</TYPE>
        </LIB>
        <LIB>
                <ALIAS>Math_Double</ALIAS>
                <FILE>__Lib_MathDouble</FILE>
                <TYPE>SYSTEM</TYPE>
        </LIB>
        <LIB>
                <ALIAS>Delays</ALIAS>
                <FILE>__Lib_Delays</FILE>
                <TYPE>SYSTEM</TYPE>
        </LIB>
        <LIB>
                <ALIAS>System</ALIAS>
                <FILE>__Lib_System</FILE>
                <TYPE>SYSTEM</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>C_Type</ALIAS>
        	<FILE>__Lib_CType</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>String</ALIAS>
        	<FILE>__Lib_String</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Conversions</ALIAS>
        	<FILE>__Lib_Conversions</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Time</ALIAS>
        	<FILE>__Lib_Time</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Trigon</ALIAS>
        	<FILE>__Lib_Trigon</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Trigonometry</ALIAS>
        	<FILE>__Lib_Trigonometry</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Button</ALIAS>
        	<FILE>__Lib_Button</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Keypad4x4</ALIAS>
        	<FILE>__Lib_Keypad4x4</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Manchester</ALIAS>
        	<FILE>__Lib_Manchester</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>One_Wire</ALIAS>
        	<FILE>__Lib_OneWire</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>PS2</ALIAS>
        	<FILE>__Lib_PS2</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Sound</ALIAS>
        	<FILE>__Lib_Sound</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Software_I2C</ALIAS>
        	<FILE>__Lib_SoftI2C</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Software_SPI</ALIAS>
        	<FILE>__Lib_SoftSPI</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Software_UART</ALIAS>
        	<FILE>__Lib_SoftUART</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Port_Expander</ALIAS>
        	<FILE>__Lib_PortExpander</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>CAN_SPI</ALIAS>
        	<FILE>__Lib_CANSPI</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Glcd_Fonts</ALIAS>
        	<FILE>__Lib_GlcdFonts</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Glcd</ALIAS>
        	<FILE>__Lib_Glcd</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Lcd_Constants</ALIAS>
        	<FILE>__Lib_LcdConsts</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>Lcd</ALIAS>
        	<FILE>__Lib_Lcd</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>RS485</ALIAS>
        	<FILE>__Lib_RS485</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>T6963C</ALIAS>
        	<FILE>__Lib_T6963C</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>SPI_Glcd</ALIAS>
        	<FILE>__Lib_SPIGlcd</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>SPI_Lcd</ALIAS>
        	<FILE>__Lib_SPILcd</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>SPI_Lcd8</ALIAS>
        	<FILE>__Lib_SPILcd8</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>SPI_T6963C</ALIAS>
        	<FILE>__Lib_SPIT6963C</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        <LIB>
        	<ALIAS>SPI_Ethernet</ALIAS>
        	<FILE>__Lib_EthEnc28j60</FILE>
        	<TYPE>REGULAR</TYPE>
        </LIB>
        </LIBRARIES>
</MCU>

And a simple test program using Timer1 interrupt, ADC, UART and xdata RAM test.

Code: Select all

program test_cc2510;

uses cc2510_radio_driver;

const
  xx : byte = $4F;

var
  a: byte; bdata;
  a20 : byte; idata;
  __P0 : byte; sfr; absolute $80;
  xd : dword; xdata;
  //radio_buffer1 : array[1920] of byte; xdata;
  radio_buffer : array[1915] of byte; xdata;  //max 3840 byte!

  // LCD module connections
var LCD_RS : sbit at P1_4_bit;
var LCD_EN : sbit at P1_5_bit;

var LCD_D4 : sbit at P0_4_bit;
var LCD_D5 : sbit at P0_5_bit;
var LCD_D6 : sbit at P0_6_bit;
var LCD_D7 : sbit at P0_7_bit;

    txt3 : array[8]  of char; xdata;
    txt4 : array[7]  of char; xdata;


// End LCD module connections


  counter1, counter2 : word;
  led_blink_enabled : boolean;
  filter_on         : boolean;
  ACC_SP            : byte;
  ACC_HIST          : byte;
  
  LED_GREEN  : sbit at P1.0;
  LED_RED    : sbit at P1.1;
  LED_YELLOW : sbit at P2.0;
  
procedure Compiler_Delays_Test;
begin
  while True do
    begin
      LED_YELLOW := 0; //LED_YELLOW := 1;
      
      {asm
        MOV  R7, #3
        DJNZ R7, PC-2
      end;}
      
      {asm
        MOV R7, #5
        DJNZ R7, PC-2
        NOP
      end;}
      
      //Delay_us(1);
      //Delay_ms(100);
      LED_YELLOW := 1;
      
      {asm
        MOV R7, #3
        DJNZ R7, PC-2
        NOP
      end;}
      
      //Delay_us(1);
      //Delay_us(1);
      //Delay_us(1);
      //Delay_ms(100);
      //Delay_us(100000);
      //LED_YELLOW := 1;
      //Delay_us(500);
      //LED_YELLOW := 0;
      //Delay_us(500);
    end;
end;

procedure USART1_Init;
const
  BAUD_M : byte = 131; //131 - 9600
  BAUD_E : byte = 8;   //8   - 9600
begin
  PERCFG.U1CFG := 1;  //ALT LOCATION 2 for USART1
  P0SEL := P0SEL or %00000111;  //ADC - 0,1,2
  P1SEL := P1SEL or %11000000;  //USART1 select
  P1DIR.6 := 1; //TX
  P1DIR.7 := 0;  //RX
  U1CSR := U1CSR or %11000000;  //UART Mode & RECV Enabled
  //U1UCR - Unchanged
  U1GCR := U1GCR or BAUD_E;
  U1BAUD := BAUD_M;
  
  U1DBUF := $FF; //cos status bit is 0 by reset!?!
end;

function USART1_Write_Byte(data_to_send : byte) : boolean;
const
  TX_BYTE : byte = 1;
begin
  Result := False;
  if U1CSR.TX_BYTE = 1 then
    begin
      U1CSR.TX_BYTE := 0;
      U1DBUF := data_to_send;
      Result := True;
    end;
end;
  
procedure Timer1_Init;
begin
  T1CNTL := 0;
  T1CC0H := $65;  //$0A28 - 100us
  T1CC0L := $90;  //$6590 - 1ms
  T1CTL := %00000010;
  IEN1.T1IE := 1;
end;

procedure ADC_Init;
begin
  ADCCFG := %00000111;  //AN0..AN2
  P0DIR := P0DIR and $11111000;//not ADCCFG;
  ADCCON1.5 := 1;
  ADCCON1.4 := 1;  //Manual Conversion
  ADCCON2 := %10110010;  //14 bit
  //ADCCON3 := %10110001;
end;

function ADC_Get_Sample : dword;//byte;
var
 _adcl, _adch : byte;
begin
  //ADCCON1.ST := 1;               //Start Conversion
  ADCCON3 := %10110000;          //CH0
  while ADCCON1.EOC = 0 do nop;  //Wait for conversion complete
  _adcl := ADCL;
  _adch := ADCH;
  Lo(Result) := _adch;
  
  ADCCON3 := %10110001;          //CH1
  while ADCCON1.EOC = 0 do nop;  //Wait for conversion complete
  _adcl := ADCL;
  _adch := ADCH;
  Hi(Result) := _adch;
  
  ADCCON3 := %10110010;          //CH2
  while ADCCON1.EOC = 0 do nop;  //Wait for conversion complete
  _adcl := ADCL;
  _adch := ADCH;
  Higher(Result) := _adch;
  
  Highest(Result) := $FF;
end;


  
procedure INT_TEST; org IV_RF;//org $83;
begin
  nop;
end;

procedure Timer1_ISR; org $4B;
begin
  T1CNTL := 0;
  T1CTL.OVFIF := 0;
  
  Inc(counter1);
end;

label lb, lc;

//org $008e; //MAIN ORG
begin
  CLKCON := 0;  //26Mhz all
  P0DIR := $00;
  P1DIR := $03;
  P2DIR := $01;
  counter1 := 0;
  counter2 := 0;
  IEN0.EA := 0;  //1 ->Enable All Ints (GLOBAL)
  
  Timer1_Init;
  USART1_Init;
  ADC_Init;
  RADIO_Init;
  
    Lcd_Init();                        // Initialize LCD
    Lcd_Cmd(_LCD_CLEAR);               // Clear display
    Lcd_Cmd(_LCD_CURSOR_OFF);          // Cursor off
    Lcd_Out(1,6,txt3);                 // Write text in first row
    Lcd_Out(2,6,txt4);                 // Write text in second row

  LED_RED := 0;
  LED_GREEN := 0;
  led_blink_enabled := False;
  ACC_SP := 45;
  ACC_HIST := 10;
  
  //delays test
  MEMCTR.CACHDIS := 1;
  //MEMCTR.PREFDIS := 1;
  
  while True do
    Compiler_Delays_Test;
  
  while True do
    begin
      if led_blink_enabled then
        if counter1 >= 500 then
          begin
            //if P1.0 = 1 then
              //P1_0_bit := 0//
              //P1.0 := 0
            //else
              //P1_0_bit := 1;//
              //P1.0 := 1;
            counter1 := 0;
            //Inc(xd);
            //xd := ADC_Get_Sample;
            USART1_Write_Byte(Lo(xd));
            while U1CSR.1 = 0 do nop;
            USART1_Write_Byte(Hi(xd));
            while U1CSR.1 = 0 do nop;
            USART1_Write_Byte(Higher(xd));
            while U1CSR.1 = 0 do nop;
            USART1_Write_Byte(PARTNUM);
            //USART1_Write_Byte(Highest(xd));
            //while U1CSR.1 = 0 do nop;
          end;
      xd := ADC_Get_Sample;
      if Lo(xd) < ACC_SP then
        LED_RED := 1
      else
        if Lo(xd) >= ACC_SP + ACC_HIST then
          LED_RED := 0;
      if Hi(xd) > ACC_SP + 5 then
        LED_GREEN := 1
      else
        if Hi(xd) <= ACC_SP + 5 - ACC_HIST then
          LED_GREEN := 0;
      if Higher(xd) > ACC_SP then
        LED_YELLOW := 1
      else
        if Higher(xd) < ACC_SP - ACC_HIST then
          LED_YELLOW := 0;
          
      if P1.2 = 0 then
        ACC_HIST := 10;
      if P1.3 = 0 then
        ACC_HIST := 0;
        
      //if PARTNUM = $81 then
      //  if P1.3 = 0 then
      //    P1.1 := 1
      //  else
      //    P1.1 := 0;
      
      a.0 := 1;
      a20.1 := 1;
      P0.1 :=1;
      P0_1_bit := 1;
      P0_2_bit := 1;
      //radio_buffer1[1] := 76;
      //xd := 8;
      

      for counter2 := 0 to sizeof(radio_buffer)-1 do
        radio_buffer[counter2] := VERSION;
      //radio_buffer1[0] := PARTNUM;
      //Inc(counter2);
      //if counter2 >= sizeof(radio_buffer) then
        //counter2 := 0;
        
      for counter2 := 0 to sizeof(radio_buffer)-1 do
        if radio_buffer[counter2] <> VERSION then
        begin
          LED_RED := 1;
          goto lb;
        end;
      lc:
        led_blink_enabled := True;
        //LED_GREEN := 1;
        //counter1 := 0;
      lb:
    end;
end.

[anikolic]

matrix,

We are so impressed! Great work!!!
Do you already have licensed copy of mikroPascal PRO for 8051? We are considering to provide you with one because this contribution of yours is outstanding!

We would like to have this Topic set as "Sticky", so that all users who want to do something like you, would have a great reference for development.

If you have spear time, can you please make definition files, and example project for Package Manager (http://www.mikroe.com/esupport/index.ph ... s&newsid=6) and we would like to include your work on our Projects download page.

This is a great example of how dedication and research, combined with hard work can give fantastic results!

Best regards,
Aleksandar

[matrix]

matrix,

We are so impressed! Great work!!!
Do you already have licensed copy of mikroPascal PRO for 8051? We are considering to provide you with one because this contribution of yours is outstanding!

We would like to have this Topic set as "Sticky", so that all users who want to do something like you, would have a great reference for development.

If you have spear time, can you please make definition files, and example project for Package Manager (http://www.mikroe.com/esupport/index.ph ... s&newsid=6) and we would like to include your work on our Projects download page.

This is a great example of how dedication and research, combined with hard work can give fantastic results!

Best regards,
Aleksandar

Hello!
No, I haven't licensed copy. I'm very proud, this is a big reward for me. I get impressed too.

Now I'm going to get RADIO Module working, and then /I think in 1-2 weeks/ I'll make an example project.

Kind regards, Rado.

[piort]

Hi Rado,

you have make a very nice job on this one...Gratz

[anikolic]

Hi Rado,

Now I'm going to get RADIO Module working, and then /I think in 1-2 weeks/ I'll make an example project.

Please do so, and don't hesitate to contact us as soon as you are finished.

One of my colleagues will contact you on your private E-mail regarding your new mikroPascal PRO for 8051 license.

Keep up the good work!

Best regards,
Aleksandar

[matrix]

Hi Rado,

you have make a very nice job on this one...Gratz

Hi Piort, and you help me too for this result.

Finally, I get radio module working. It was a hard battle, cos the documentation of radio module is not clearly understandable for me. I get some C code and port it. It still have some issues, but it works. Here it is:

cc2510_radio_driver.mpas

Code: Select all

unit cc2510_radio_driver;


//==============================================================================
//CHIPCON
var
  rf_length : byte;
  pPayLoad : ^array[$FF] of byte;
  rb : array[30] of byte;
function halRfConfig(frequency : dword) : boolean;
function halRfSendPacket(var pDataToSend : array[$FF] of byte; _length : byte) : byte;
function halRfReceivePacket(var pRecvFrame : array[$FF] of byte; pRSSI : ^ byte; pLQI : ^byte; timeout : word) : byte;

//==============================================================================

implementation

var
  //length : byte;
  isLengthByte : boolean;
  index : byte;
  //pPayLoad : ^array[$FF] of byte;
  pRssiVal : ^byte; //xdata;
  pLqiVal  : ^byte;
  lengthReceived : boolean;
  
  recvbuffer : array[$FF] of byte;
  
  


//==============================================================================
//CHIPCON
//==============================================================================

procedure halRfSetRadioFrequency(frequency : dword);
begin
  frequency := frequency shl 10;
  frequency := frequency div 1000;
  frequency := frequency shl 6;
  frequency := frequency div 26;
  FREQ0 := Lo(frequency);
  FREQ1 := Hi(frequency);
  FREQ2 := Higher(frequency);
end;

function halRfConfig(frequency : dword) : boolean;
var
  status : boolean;
begin
  // Setting the frequency
  halRfSetRadioFrequency(frequency);
  
  if frequency > 2400000 then
    begin
      // 250kbps MSK setup (for other data rates or modulation formats, please see SmartRF Studio).
      // Dynamic packet length and append status
      PKTLEN := 0xFF;
      PKTCTRL0 := 0x05;
      PKTCTRL1 := 0x04;
      
      // IF frequency
      FSCTRL1 := 0x0A;
      FSCTRL0 := 0x00;
      
      // filter BW, data rate,
      MDMCFG4 := 0x2D;
      MDMCFG3 := 0x3B;

      // Modulation format, detection level
      MDMCFG2 := 0x73;
      MDMCFG1 := 0x22;
      MDMCFG0 := 0xF8;

      // Deviation setting
      DEVIATN := 0x00;

      // Calibration synth
      MCSM2 := 0x07;
      MCSM1 := 0x30;
      MCSM0 := 0x10;

      // Frequency offset compensation configuration
      FOCCFG := 0x1D;

      // Bit synchronization
      BSCFG := 0x1C;

      // AGC settings
      AGCCTRL2  := 0xC7;
      AGCCTRL1  := 0x00;
      AGCCTRL0  := 0xB2;

      // Front end settings (from SmartRf04)
      FREND1 := 0xB6;
      FREND0 := 0x10;

      // Synth calibration
      FSCAL3 := 0xEA;
      FSCAL2 := 0x0A;
      FSCAL1 := 0x00;
      FSCAL0 := 0x11;

      // From Smart RF Studio
      FOCCFG := 0x1D;
      BSCFG := 0x1C;
      FSTEST := 0x59;
      PTEST := 0x7F;
      AGCTEST := 0x3F;
      TEST2 := 0x88;
      TEST1 := 0x31;
      TEST0 := 0x0B;

      // Output power
      PA_TABLE0 := 0xFF;

      // Calibrating synth.
      RFST      := SIDLE;
      RFST      := SCAL;
      while MARCSTATE <> mrcs_IDLE do nop;

      //clear RF int flag
      RFTXRXIF_bit := 0;

      status := True;
    end
  else
    begin
      status := False;
    end;
    
  Result := status;
end;

function halRfSendPacket(var pDataToSend : array[$FF] of byte; _length : byte) : byte;
var
  index : byte;
begin
  if _length = 0 then
    begin
      Result := 0;
      Exit;
    end;
    
  RFTXRXIF_bit := 0;
  IEN0.RFTXRXIE := 0;
  RFIF.IRQ_DONE := 0;

  RFST := STX;  //tansmith mode
  
  while RFTXRXIF_bit = 0 do nop;
  RFTXRXIF_bit := 0;
  RFD := _length;
  //data send
  for index := 0 to _length - 1 do
    begin
      while RFTXRXIF_bit = 0 do nop;
      RFTXRXIF_bit := 0;
      RFD := pDataToSend[index];
    end;
  // Waitting for transmission to finish
  while RFIF.IRQ_DONE = 0 do nop;  /
  RFIF.IRQ_DONE := 0;
  
  RFST      := SIDLE;
end;

function halRfReceivePacket(var pRecvFrame : array[$FF] of byte; pRSSI : ^byte; pLQI : ^byte; timeout : word) : byte;
begin
  P2.0 := not P2.0;

  index := 0;
  RFTXRXIF_bit := 0;
  IEN0.RFTXRXIE := 1;
  RFIF.IRQ_DONE := 0;

  pPayLoad := @pRecvFrame;
  pRssiVal := pRssi;
  pLqiVal := pLqi;
  pRssiVal^ := 0;
  pLqiVal^ := 0;
  lengthReceived := False;
  
  isLengthByte := True;
  
  RFST := SRX;
  
  while RFIF.IRQ_DONE = 0 do
    begin
      if timeout <> 0 then
        begin
          Delay_ms(1);
          Dec(timeout);
        end
      else
        begin
          if lengthReceived = True then
            begin
              timeout := 100;
              lengthReceived := False;
            end
          else
            begin
              RFST := SIDLE;
              IEN0.RFTXRXIE := 0;  //disable RF int
              Result := 0; Exit;
            end;
        end;
    end;

  RFST := SIDLE;
  RFIF.IRQ_DONE := 0;
  IEN0.RFTXRXIE := 0;  //disable RF int
  
  if (Lqi and $80) <> 0 then
    Result := index - 1
  else
    Result := 0;
end;

procedure RF_TXRX_ISR; org IV_RFTXRX;
var
  vrb : byte; volatile;
begin
  //INT FLAG IS AUTO CLEARED!!!
  //debug
    //P2.0 := not P2.0;
  //end debug
  if isLengthByte then
    begin
      rf_length := RFD;
      isLengthByte := False;
      lengthReceived := True;
    end
  else
    if index < rf_length then
      begin
        //Inc(index);
        //Inc(pPayLoad);// := @recvbuffer + index;
        pPayLoad^[index] := RFD;
        
        //rb[index] := RFD;
        Inc(index);
      end
    else
      if index = rf_length then
        begin
          //vrb := RSSI;
          pRssiVal^ := RFD;//RSSI;// RFD;
          Inc(index);
        end
      else
        begin
          //vrb := LQI;
          pLqiVal^ := RFD;//LQI;
          isLengthByte := True;
        end;
end;

end.

And some example of how to use it:

SENDING:

Code: Select all

while True do
    begin
      if counter1 >= 200 then
        begin
          
          halRfSendPacket(radio_buffer1, sizeof(radio_buffer1));
  
          P1.0 := not P1.0;
          counter1 := 0;
        end;
      if P1.2 = 0 then
        radio_buffer1[12] := radio_buffer1[12] or $01
      else
        radio_buffer1[12] := radio_buffer1[12] and $FE;
      if P1.3 = 0 then
        radio_buffer1[12] := radio_buffer1[12] or $02
      else
        radio_buffer1[12] := radio_buffer1[12] and $FD;
    end;

RECEIVING:

Code: Select all

while True do
    begin
      if halRfReceivePacket(radio_buffer1, _RSSI, _LQI, 100) <> 0 then
        for index := 0 to 12 do
          begin
            while U1CSR.UART_TXBYTE = 0 do nop;
            USART1_Write_Byte(radio_buffer1[index]);
          end;
      if (radio_buffer1[12] and $02) <> 0 then
        P1.0 := 1
      else
        P1.0 := 0;
      if (radio_buffer1[12] and $01) <> 0 then
        P1.1 := 1
      else
        P1.1 := 0;
    end;

radio_buffer1 is declared like this:

Code: Select all

radio_buffer1 : array[30] of byte;

And here I have a question to ME:

How we can use a pointer to xdata memory space, ie to declare buffer :

Code: Select all

radio_buffer1 : array[30] of byte; xdata;

[matrix]

LCD Library from ME is tested and works OK. If you use a four row display, just address it as two with positions [1..32].

[slavisa.zlatanovic]

Hi!

Great to hear that!
Keep going!

[matrix]

Hi people!
Here you may see some pictures from my second project with this chip (the first is still in development ):

http://radonen.cjb.net/

This is a remote control unit for this type of counters (also developed by me several years ago):

http://stselectronics.eu/counters_en.html

Project includes LCD, Conversions, Keypad4x4 and String libraries from ME and mine RF & UART.

[matrix]

PS/2 Library also confirmed to work properly.

[usertech]

Hi people!
Here you may see some pictures from my second project with this chip (the first is still in development ):

http://radonen.cjb.net/

This is a remote control unit for this type of counters (also developed by me several years ago):

http://stselectronics.eu/counters_en.html

Project includes LCD, Conversions, Keypad4x4 and String libraries from ME and mine RF & UART.

What is your relationship with STS Electronics

[matrix]

What is your relationship with STS Electronics

Ex-developer.

[jzjeff]

Hello, I am Jeff and have a couple of questions.

What do I need in order to program this chip.
What type of board can I use, and what language should I use also.

Would it be hard to program one of these in order to send a command to a servo, and gyro?

Also would it be hard to program one to talk to an exact frequency?

THX,
Jeff
jzjeff@live.com

[jzjeff]

I would like this to be private so the creator can send me an email
if possible.