Errors in programming SPI control register

[JIH]

I have found a couple of mistakes in the Spix_init_advanced commands for PIC24.
"_SPI_DATA_SAMPLE_END" should set bit 9 high, 0x0200; it wrongly sets bit 13 high, 0x2000.
"_SPI_ACTIVE_2_IDLE" set the control bit for "_SPI_IDLE_2_ACTIVE aand vice versa.

[Sobrietytest]

Both parameters are co-dependant on other settings; e.g. _SPI_ACTIVE_2_IDLE refers to the CLOCK_IDLE status. If your clock is idling high then the _SPI_ACTIVE_2_IDLE can appear to be wrong.

TBH, if you fret about the register contents you're just going to get tied in knots. Personally, I look at the peripheral's timing diagram, check what it wants for comms and then set the SPI channel accordingly. I've found from bitter experience that it's more productive to familiarise yourself with the whole engine rather than worrying about sump plug.

Now if only someone could explain pointers to me...

[idakota]

Take a look at:
http://www.geekpedia.com/tutorial44_Und ... nters.html