Code: Select all
var TMR1 : word;absolute 0x0FCE; volatile; register;
#1 Post by jpc » 01 Nov 2006 19:46
Code: Select all
var TMR1 : word;absolute 0x0FCE; volatile; register;
#2 Post by zristic » 02 Nov 2006 09:23
#3 Post by jpc » 02 Nov 2006 14:39
Using the TMR1 as i proposed writes the low byte first and the timer is not well initialised !11.5 Timer1 16-Bit Read/Write Mode
Timer1 can be configured for 16-bit reads and writes
(see Figure 11-2). When the RD16 control bit
(T1CON<7>) is set, the address for TMR1H is mapped
to a buffer register for the high byte of Timer1. A read
from TMR1L will load the contents of the high byte of
Timer1 into the Timer1 high byte buffer. This provides
the user with the ability to accurately read all 16-bits of
Timer1 without having to determine whether a read of
the high byte followed by a read of the low byte is valid,
due to a rollover between reads.
A write to the high byte of Timer1 must also take place
through the TMR1H buffer register. Timer1 high byte is
updated with the contents of TMR1H when a write
occurs to TMR1L. This allows a user to write all 16 bits
to both the high and low bytes of Timer1 at once.
The high byte of Timer1 is not directly readable or writable
in this mode. All reads and writes must take place
through the Timer1 high byte buffer register. Writes to
TMR1H do not clear the Timer1 prescaler. The
prescaler is only cleared on writes to TMR1L.
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