prioritized interrupts

[janni]

There are some problems with low priority interrupts:

1. The RETFIE 0 instruction at the end of interrupt_low procedure is coded as RETFIE 1 (thus the carefully restored WREG, STATUS & BSR are overwritten with shadow registers' contents).

2. The same registers are used for saving/restoring FSRs in high and low priority interrupts. This can't work properly. (Haven't checked how the STACK_X registers are saved - hopefully in a better way.)

3. MOVFF instructions are used for saving WREG, STATUS & BSR in interrupt_low procedure which, due to silicon errors in some processors, will lead to incorrect saving/restoration of these registers by high priority interrupt. A workaround for this requires use of CALL FAST, which is wrongly coded by mP.

And one thing of less importance - a jump is always placed at address 08 (the high priority interrupt) - even if the ISR is very short and could fit into the $08-$17 space. On the other hand, the compiler by itself places short routines (if there are such) in this space. Why not allow short ISR to stay at address $08?

BTW, will it take long for new release to appear? I'm a bit tired of correcting hex files.