Hello,
I am currently using the Mikromedia 7 FPI Capacitive SoC with STMF745ZG MCU, which includes the LAN8720A PHY. However, I'm encountering issues as the LEDs on the PHY do not light up, and my PC shows the cable as unplugged. I have thoroughly checked all the connections and cables, but the problem persists.
One of the challenges I faced was in the CubeIDE since there is no specific LAN8720A option available. Instead, I selected LAN8742A, which seemed to have similar register addresses. With this configuration and when I enable MCO with 25MHz, I can successfully read and write to ETH registers. However, I am still unable to establish a connection with my PC. During debugging, I noticed that the Lan8742_Init process completes a soft reset and obtains the correct PHY address (0). Despite this, the link status remains as "link down." When I check the BSR registers, they also indicate a "link down" state.
I considered that the issue might be related to the CLK (clock) settings. The LAN8720A datasheet recommends using a 50MHz clock source with RMII. However, when I set MCO to 50MHz, I encounter problems such as failing to get the PHY address and being unable to read or write to PHY registers.
To provide more context, I have attached the schematics for STM32F745ZG and the diagrams for REF_CLK_In mode. In the schematics PA1 connected to MCO. In CubeIDE pinouts PA1 is ETH_REF_CLK. That's why I think I should use REF_CLK_In mode.
I would greatly appreciate any assistance in resolving this issue. If you have any insights or suggestions, please let me know.
Thank you for your help!
Mikromedia 7 FPI Capacitive Ethernet Problem
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Mikromedia 7 FPI Capacitive Ethernet Problem
#1 Post by enesceelik@gmail.com » 25 Jul 2023 14:15
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- Tanja_Kovacevic
- mikroElektronika team
- Posts: 98
- Joined: 09 Aug 2021 11:39
Re: Mikromedia 7 FPI Capacitive Ethernet Problem
#2 Post by Tanja_Kovacevic » 22 Aug 2023 14:49
Hi Enes,
MCO is tied to both pins PA8 and PA1.
PA8 is MCO1 (Main clock output), and on that pin, a clock can be generated and guided to PA1 (which is RMII_REF_CLK),
and to the clock input of LAN8720, which you nicely noticed works in REF_CLK In Mode and it should generate a 50 MHz clock on PA8.
You can contact us at support att mikroe dot com so we can send you the ETH example.
Kind regards,
Tanja
MCO is tied to both pins PA8 and PA1.
PA8 is MCO1 (Main clock output), and on that pin, a clock can be generated and guided to PA1 (which is RMII_REF_CLK),
and to the clock input of LAN8720, which you nicely noticed works in REF_CLK In Mode and it should generate a 50 MHz clock on PA8.
You can contact us at support att mikroe dot com so we can send you the ETH example.
Kind regards,
Tanja
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