Yet another HID communication

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samolet4e
Posts: 14
Joined: 16 Aug 2014 10:45

Yet another HID communication

#1 Post by samolet4e » 23 Sep 2019 10:27

Hello. I've got stuck in making HID communication work. I use PIC32MX250F128B. I have read many articles in the matter including few chats in the mikroE forum. Nevertheless, I was unable to get my PIC to work. The device doesn't respond no matter how I tried. I am posting my circuit, project settings, and the code itself. I've got 8 MHz resonator, the system clock is 72 MHz, the USB clock is 48 MHz. It goes without saying that the USB descriptor file has been included in the project. Also, I use Windows 10 x64 with disabled driver signature verification.
I wouldn't ask if it weren't necessary. Is there something amiss? The device can not be seen in the HID terminal. Frankly, I am running out of ideas. Please, help me out making this thing work.
Thank you in advance.

Code: Select all

char kk;
char readbuff[64];
char writebuff[64];

void main(void) {

     ANSELB = 0x0000; // PORTB is digital
     TRISB.F11 = 0;   // output
     TRISB.F10 = 1;   // intput

     HID_Enable(&readbuff, &writebuff);

     while(1) {
              USB_Polling_Proc();
              kk = HID_Read();
              if (kk != 0) {
                 for (cnt = 0; cnt < 64; cnt++) writebuff[cnt] = readbuff[cnt];
                 HID_Write(&writebuff, 64);
              }//if
     }//while

     return;
}//main
Attachments
PIC32MX_USB_HID.zip
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circuit.png
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samolet4e
Posts: 14
Joined: 16 Aug 2014 10:45

Re: Yet another HID communication

#2 Post by samolet4e » 24 Sep 2019 11:22

Hello, again. It seems that both code and schematics are correct. The only reason for the HID communication not to work is the system clock. Although the USB clock is correct (48 MHz), the system clock of 72 MHz seems to prevent the HID communication from happening. It is too high. I lowered the clock down to 36 MHz and now the project works. So here are my settings:

8 MHz crystal oscillator
PLL Input Divider 2x
PLL Multiplier 18x
System PLL Output Clock Divider PLL Divide by 2

USB PLL Input Divider 2x (only 4 MHz or 5 MHz are allowed at the USB PLL input)
USB PLL Enable

I am sending both polling and interrupt version of the code. Don't forget to alter USB_INTERRUPT variable accordingly in the USBdsc.c file.
I'd like to ask how the system clock affects the HID communication. What does the USB PLL serve for?

Code: Select all

char cnt, kk;
char readbuff[64];
char writebuff[64];

//#define POLLING
//Don't forget to alter USB_INTERRUPT variable accordingly in USBdsc.c file

#ifndef POLLING
void USB_Isr() iv IVT_USB_1 ilevel 7 ics ICS_SOFT {
     USB_Interrupt_Proc(); // USB servicing is done inside the interrupt
     USBIF_bit = 0;
}//USB_isr
#endif

void main(void) {

//     ANSELB = 0xF3FF; // ports RB11 and RB10 are digital
     ANSELB = 0x0000;
//     TRISB.F10 = 1; // input
//     TRISB.F11 = 0; // output
#ifndef POLLING
     // Interruption USB over vector 7
     USBIP0_bit = 1;
     USBIP1_bit = 1;
     USBIP2_bit = 1;
//     USBIE_bit = 1;
     EnableInterrupts();
#endif
     HID_Enable(&readbuff, &writebuff);

     while(1) {
#ifdef POLLING
              USB_Polling_Proc(); // Call this routine periodically
#endif
              kk = HID_Read();
              if (kk != 0) {
                 for (cnt = 0; cnt < 64; cnt++) writebuff[cnt] = readbuff[cnt];
                 HID_Write(&writebuff, 64);
              }//if
     }//while

     return;
}//main
P.S. This guy developed a similar code in mikroPascal and helped me a lot:
http://git.munts.com/muntsos/examples/ ... RemoteIO/

User avatar
stefan.filipovic
mikroElektronika team
Posts: 1135
Joined: 18 Dec 2018 10:30

Re: Yet another HID communication

#3 Post by stefan.filipovic » 26 Sep 2019 15:36

Hi,

The USBCLK can be derived from the 8 MHz internal FRC Oscillator, 48 MHz POSC, or the 96 MHz PLL from the POSC. For normal operation, the USB module requires exact 48 MHz clock. When using 96 MHz PLL, the output is internally divided to obtain 48 MHz clock. The FRC clock source is used to detect USB activity and bring USB module out of Suspend mode. Once USB module is out of Suspend mode, it must use a 48 MHz clock to perform the USB transactions.
The UPLL Enable and Input Divider bits are contained in the DEVCFG2 register. The input to the UPLL must be limited to 4 MHz only. An appropriate input divider must be selected to ensure that the UPLL input is 4 MHz.
To read more about that, please refer to Section 6. “Oscillator Configuration” (DS60001112) in the “PIC32 Family Reference Manual”.

However, the maximal operating frequency for this specific MCU is 50 MHz, according to its datasheet.

Kind regards,
Stefan Filipović

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