LVD with PLL

General discussion on mikroPascal for dsPIC30/33 and PIC24.
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javor.pas
Posts: 98
Joined: 16 Mar 2007 11:25
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LVD with PLL

#1 Post by javor.pas » 17 Jul 2008 07:40

Hallo.

I'm stuck. I'm using my old 30F4013/20MHz. LVD module is enabled. When the PIC works without PLL, i.e. on 20MHz the LVD module works just fine - everything is written correctly to PIC's EEPROM. When however I set the PIC to work on HS2PLL4 or HS2PLL8 (40 and 80MHz respectivly) the LVD "sometimes" misses the write operation - either does not write, or writes incorrect data. What may be the reason? I need the PLL in order to have a good communication with the ENC. So I have to find a decision. Here's my code for the LVD module:

Code: Select all

procedure WaitWR;
begin
 while NVMCON.15 = 1 do //wait until WR:=0
//  nop;
//   begin
//   end;
end;

procedure LVDetect_Interrupt; org $68; // low voltage detection!
var Data : array [24] of Word;
begin
  IEC0:=0;
  IEC1:=0;
//  IEC2.10:=0;
  CORCON.3:=1;
  SR.7:=1;
  SR.6:=1;
  SR.5:=1;
  //IEC0:=IEC0 and 0xFFB7; //0xFFF7; // %1111111111110111
  Data[0]:=ProductionCounterLowWord;
  Data[1]:=ProductionCounterHighWord;
  Data[2]:=TaLowWord;
  Data[3]:=TaHighWord;
  Data[4]:=Tf;
  Data[5]:=Tmin;
  Data[6]:=Tmax;
  Data[7]:=Day;
  Data[8]:=Month;
  Data[9]:=Year;
  Data[10]:=Hour;
  Data[11]:=Min;
  Data[12]:=Sec;
  Data[13]:=LastLogPage;
  Data[14]:=LastLogNum;
  Data[15]:=Address_485;
  Data[16]:=myIpAddr[0] shl 8 + myIpAddr[1];
  Data[17]:=myIpAddr[2] shl 8 + myIpAddr[3];
  Data[18]:=myPort;
  Data[19]:=PasswordLowWord;
  Data[20]:=PasswordHighWord;
  Data[21]:=myMacAddr[0] shl 8 + myMacAddr[1];
  Data[22]:=myMacAddr[2] shl 8 + myMacAddr[3];
  Data[23]:=myMacAddr[4] shl 8 + myMacAddr[5];

  Eeprom_Write_Block(CounterAddress, Data);
  WaitWR;
  
  CORCON.3:=0;
  SR.7:=0;
  SR.6:=0;
  SR.5:=1;
  IEC0:=IEC0 or  0x0048;
end;
Other config: Master Clear is ON, Fail Safe Clock Monitor is OFF, WatchDog is ON with a PSA=512, PSB=4 (4096ms), BOR is ON to a 2V, COE_OFF, BKBUG_OFF.

Any suggestions will be highly appreciated.

Thank you in advance.

Regards,

Javor
I sit and think, sit and think... and some time I notice I only sit :)

piort
Posts: 1379
Joined: 28 Dec 2005 16:42
Location: Laval,Québec,Canada,Earth... :-)
Contact:

#2 Post by piort » 17 Jul 2008 12:01

hi,
do you have chk the errata sheet from microchip ?

you have few thing there about 4xpll, 8xpll and LVD....

http://ww1.microchip.com/downloads/en/D ... 80228J.pdf

happy reading ;-)

javor.pas
Posts: 98
Joined: 16 Mar 2007 11:25
Contact:

#3 Post by javor.pas » 17 Jul 2008 12:26

Thanks, piort. I've checked the errata some time before. However for my needs according to errata I almost meet all requirements. The thing I cannot understand is what they have in mind with
"When using the external Low Voltage Detect (LVD)
module, interrupts are generated independent of
the voltage
.
Work around
The LVD module works as an internal reference
source only."
And what does the workaround mean? Anyway - the pic works on 3.0V. Seems all info is written when the LVD threshold voltage (or whatever it is called) is set to 2.9V. When I post the problem it was 2.6V which seemed too low for me. When the voltage is 2.9V the pic seems to "have enough time" to write all the info in the EEPROM - just before the capacitors discharge fully. I'll keep testing with threshold voltage of 2.8-2.9V. For now seems fine.

Thanks once again.

Regards,

Javor
I sit and think, sit and think... and some time I notice I only sit :)

piort
Posts: 1379
Joined: 28 Dec 2005 16:42
Location: Laval,Québec,Canada,Earth... :-)
Contact:

#4 Post by piort » 17 Jul 2008 15:03

hi,
is more about your pll prob...
When the 4x PLL mode of operation is selected,
the specified input frequency range of 4-10 MHz is
not fully supported.
When device VDD is 2.5-3.0V, the 4x PLL input
frequency must be in the range of 4-5 MHz. When
device VDD is 3.0-3.6V, the 4x PLL input frequency
must be in the range of 4-6 MHz for both industrial
and extended temperature ranges.
at 3 volt with 4xPLL the max is 4 x 5 mhz so 20 Mhz...
at 40Mhz (4x 10 Mhz) you are out of the safety range...
maybe is why you have some write prob...

may i suggest to run with a low speed crystal but at 16XPLL...following the errata, they dont have prob with this set up...

HTH

SamY Fareast
Posts: 46
Joined: 05 Aug 2007 07:15
Location: Shizuoka JAPAN

EEPROMWRITE and LVD

#5 Post by SamY Fareast » 22 Jul 2008 13:49

Hi
Once I have experienced same phenomenon with my DSPIC30F2011 project( it's clocked FRC 7.36MHz).

On LVD condition interrupt code run, but fail to write EEPROM.

Code: Select all

procedure OnLVD; org $000068;
begin
  PORTC.15 := 1;
    EEPROM_Write_Block($7FFC00, SomeWordArray );
  PORTC.15 := 0;
  PORTC.15 := 1;
    while NVMCON >= $8000 do nop;
  PORTC.15 := 0;
  end;
  IFS2.LVDIF := 0;
end;
Ordinary EEPROMBlockWrite takes 2-3ms to erase EEPROM, but sometimes fail to erase rom and takes less than few usecs.

My workaround was something like this.

Code: Select all

type
  TSomeRecord = record
     {Record Members here}
  end;
  PSomeRecord = ^TSomeRecord;

var
  EEPShadow:  PSomeRecord;
  RecordToWrite: TSomeRecord;

function EEPCpyd: boolean;
begin
  {True, when RecordToWritre = EEPShadow^} 
end;

procedure OnLVD; org $000068;
begin
  while not EEPCpyd do
  begin
    PORTC.15 := 1;
    EEPROM_Write_Block($7FFC00, RecordToWrite);
    PORTC.15 := 0;
    PORTC.15 := 1;
    while NVMCON >= $8000 do nop;
    PORTC.15 := 0;
  end;
  IFS2.LVDIF := 0;
end;

begin
  {Somewhere main program}
  CORCON.2 := #1;                    // Enable PSV
  PSVPAG := $FF;                     // PSV $7F8000 -> $008000
  EEPShadow = $FC00;            //  = $7FFC00
  ...
end;
This code also prevents excessive writes to EEPROM which sometimes happens under unstable power condition.

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