The output compare module has the task of comparing the value of the time base counter with the value of one or two compare registers depending on the Operation mode selected. It is able to generate a single output pulse or a sequence of output pulses when the compared values match; also, it has the ability to generate interrupts on compare match events.
The dsPIC30F4013 controller has 4 output compare modules whereas controller dsPIC6014A has 8. Each output compare channel can select which of the time base counters, TMR2 or TMR3, will be compared with the compare registers. The counter is selected by using control bit OCTSEL (OCxCON<3>).
The output compare module has several modes of operation selectable by using control bits OCM<2:0> (ocXcon<2:0>):
Single compare match mode,
Dual compare match mode generating either one output pulse or a sequence of output pulses,
Pulse Width Modulation (PWM) mode.
NOTE: It is advisable, before switching to a new mode, to turn off the output compare module by clearing control bit OCM<2:0>.
Fig. 6-1 Functional diagram of output compare module