10.2 UART configuration
The UART uses standard non-return-to-zero (NRZ) format consisting of one START bit, eight or nine data bits, and one or two STOP bits. To increase data transmission noise immunity, parity is supported by the hardware. The UART may be configured by the user as even (logic zero or logic one is added to make the total number of units in a message even), odd or no parity.
The most common data format is 8 bits, no parity and one STOP bit (denoted as 8, N, 1), which is the default setting.
The number of data bits and the parity are specified in the PDSEL<1:0> (UxMODE<2:1>) and the number of STOP bits in the STSEL (UxMODE<0>) control bit.
The UART baud rate is configured by setting the UxBRG register.
The UART module transmits and receives the LSb first. The UART's transmitter and receiver are functionally independent, but use the same data format and baud rate.
The UART module is enabled by setting the UARTEN (UxMODE<15>) control bit. The transmit mode of the UART module is enabled by the UTXEN (UxSTA<10>) bit. Once enabled, the UxTX and UxRX pins are configured as an output and an input, respectively, overriding the TRIS and PORT register bit settings for the corresponding I/O port pins. The UxTX is at logic '1' when no transmission is taking place. The UART module is disabled by clearing the UARTEN (UxMODE<15>) control bit. This is the default state after any RESET. If the UART module is disabled, all UART pins operate as port pins under the control of their corresponding PORT and TRIS bits. Disabling the UART module resets the FIFO buffers to empty states and the baud rate counter is reset.
When the UARTEN (UxMODE<15>) bit is cleared, all error and status flags associated with the UART module: URXDA, OERR, FERR, PERR, UTXEN, UTXBRK, and UTXBF are cleared, whereas the RIDLE and TRMT bits are set to '1'. Other control bits are of no influence as long as UARTEN= 0. Clearing the UARTEN bit while the UART is active will abort all pending transmissions and receptions and reset the module. Re-enabling the UART will restart the UART in the same configuration.
Some dsPIC30F devices have an alternative set of UART transmit and receive pins that can be used for serial communication. These are very useful when the primary UART pins are shared by other preipherals. The alternate I/O pins are enabled by setting the ALTIO control bit. If ALTIO=1, the UxATX and UxARX pins are used by the UART module, instead of UxTX and UxRX.