8.4 Bit-reversed addressing
Bit-reversed addressing is used for simplifying and speeding-up the access to the arrays in FFT (Fast Fourier Transform) algorithms. Like in modulo addressing, this part of hardware allows that the part of the program which calculates the elements of an array be skipped in order to simplfy the program and speed-up its execution. This addressing method is possible only in the X space and for data writes only. It is used with the pre-increment or post-increment addressing modes. Modulo addressing and bit-reversed addressing can be enabled simultaneously using the same register. Bit-reversed addressing operation will always take precedence for data writes and modulo addressing for data reads. Therefore, modulo addressing restrictions will aplly when reading data and bit-reversed addressing restrictions when writing data.
Bit-reversed addressing enable and the size of the bit-reversed data buffer are specified by the register XBREV. Bit-reversed addressing is assigned to one of the W registers specified by the MODCON register.
Fig. 8-3 Block diagram of bit-reversed addressing of a 16-word array
Fig. 8-3 shows block diagram of bit-reversed addressing of a 16-word array. The last bit is always zero because the addresses have to be even (access to 16-bit data). The sequence of bit-revessed addresses is given in Table 8-1.
| NORMAL ADDRESS |
BIT-REVERSED |
| R1 |
R2 |
R3 |
R4 |
decimal |
R1 |
R2 |
R3 |
R4 |
decimal |
| 0 |
0 |
0 |
0 |
00 |
0 |
0 |
0 |
0 |
00 |
| 0 |
0 |
0 |
1 |
01 |
1 |
0 |
0 |
0 |
08 |
| 0 |
0 |
1 |
0 |
02 |
0 |
1 |
0 |
0 |
04 |
| 0 |
0 |
1 |
1 |
03 |
1 |
1 |
0 |
0 |
12 |
| 0 |
1 |
0 |
0 |
04 |
0 |
0 |
1 |
0 |
02 |
| 0 |
1 |
0 |
1 |
05 |
1 |
0 |
1 |
0 |
10 |
| 0 |
1 |
1 |
0 |
06 |
0 |
1 |
1 |
0 |
06 |
| 0 |
1 |
1 |
1 |
07 |
1 |
1 |
1 |
0 |
14 |
| 1 |
0 |
0 |
0 |
08 |
0 |
0 |
0 |
1 |
01 |
| 1 |
0 |
0 |
1 |
09 |
1 |
0 |
0 |
1 |
09 |
| 1 |
0 |
1 |
0 |
10 |
0 |
1 |
0 |
1 |
05 |
| 1 |
0 |
1 |
1 |
11 |
1 |
1 |
0 |
1 |
13 |
| 1 |
1 |
0 |
0 |
12 |
0 |
0 |
1 |
1 |
03 |
| 1 |
1 |
0 |
1 |
13 |
1 |
0 |
1 |
1 |
11 |
| 1 |
1 |
1 |
0 |
14 |
0 |
1 |
1 |
1 |
07 |
| 1 |
1 |
1 |
1 |
15 |
1 |
1 |
1 |
1 |
15 |
Table 8-1 Bit-reversed address sequence (16-entry)
Table 8-2 shows the dependence of the value loaded into the XBREV register on the size of the bit-reversed data buffer.
| BUFFER SIZE (16-BIT WORD) |
XBREV (XB<14:0>) |
| 1024 |
0x0200 |
| 512 |
0x0100 |
| 256 |
0x0080 |
| 128 |
0x0040 |
| 64 |
0x0020 |
| 32 |
0x0010 |
| 16 |
0x0008 |
| 8 |
0x0004 |
| 4 |
0x0002 |
| 2 |
0x0001 |
Table 8-2 Bit-revesrsed address modifier values
By using bit-reversed addressing when calculating FFT, the process is several times faster. For the dsPIC30F4013 device the size of the bit-reversed data buffer is limited to 1K words.
Example of bit-reversed addressing:
'dsPIC30F6014A
program BitRev1
dim InBuff as word[16] 'input buffer
dim BrBuff as word[16] 'bit-reversed buffer
dim i as integer
main:
TRISD = 0 'PortD is output port
TRISB = 0
for i = 0 to 15
InBuff[i] = i 'Init input buffer
BrBuff[i] = 0 'clear bit-rev buffer
next i
XBREV = $8008 'enable bit-reversed addressing for 16-word buffer
MODCON = $01FF 'setup MODCON for W1 bit-rev register
nop 'after changing MODCON forced nop is recomended
W0 = @InBuff 'W0 points to the first element of input buffer (InBuff)
W1 = @BrBuff 'W1 points to the first element of output buffer (BrBuff)
asm
repeat #15
mov [W0++], [W1++] 'fill output buffer (BrBuff)
end asm
XBREV = 0 'disable bit-reversed addressing
nop
while true 'SHOW bit-rev buffer on PORTD
for i = 0 to 15
LATB = i
LATD = BrBuff[i]
Delay_ms(2000)
next i
wend
end.
