Type A timer is available on most dsPIC30F devices. Timer1 is a type A timer. A type A timer has the following unique features over other types:

• can be operated from the device low power 32 kHz oscillator,
• can be operated in an asynchronous mode from an external clock source.

The unique feature of a type A timer is that it can be used for real-time clock (RTC) applications. A block diagram of the type A timer is shown in Fig. 4-1.

Fig. 4-1 Type A timer block diagram

Type A timer is a general purpose (GP) 16-bit timer and in the microcontroller dsPIC30F4013 it is denoted as timer1 module. Timer1 module is a 16-bit timer primarily intended for use as a real time counter, or universal period meter, or event counter in the free-running mode. Timer1 can be configured to operate as:

1. a 16-bit timer,
2. a 16-bit synchronous counter,
3. a 16-bit asynchronous counter.

Also, timer1 has the ability to operate as a gated timer, select a prescaler, operate during SLEEP or IDLE states of the microcontroller, as well as generate an interrupt request when the value of the register TMR1 equals that of the period register PR1. The condition for generatig an interrupt request could be the falling edge of an external gating signal (TGATE). Control of the operation of the timer1 module is determined by setting bits in the 16-bit configuration special function register (SFR) T1CON.

4.1.1 16-bit timer mode

In the 16-bit timer mode the value of the TMR1 counter is incremented by each instruction cycle until it is equal to the preset value of the PR1 register, when the counter is reset to ‘0’ and restarted. At this moment an interrupt request for timer1 module T1IF (in the register IFS0) is generated. Processing of this request depends on the interrupt T1IE enable bit (in the IEC0 register). Timer module continues to operate during the interrupt routine. Timer1 module can operate during the IDLE state if the TSIDL bit (T1CON<13>) is reset, but if this bit is set, the counter continues to operate after the processor is waken-up from IDLE state.   The following example demonstrates how timer1 module can be used in the 16-bit timer mode.

Example:

Switch on and off a LED diode at port D approximately 4 times per second. This example uses timer1 module having clock 256 times slower then the dsPIC clock. At each 10 000 clocks timer1 module calls interrupt routine Timer1Int and changes the value at port D.

void Timer1Int() org 0x1A{// Timer1 address in the interrupt vector table
 LATD = ~PORTD; // PORTD inversion
 IFS0 = IFS0 & 0xFFF7; // Interrupt flag reset
}

void main(){
 TRISD = 0; // PORTD is output
 LATD = 0xAAAA; // Set initial value at port D
 IPC0 = IPC0 | 0x1000; // Priority level is 1
 IEC0 = IEC0 | 0x0008; // Timer1 interrupt enabled
 PR1 = 10000; // Interrupt period is 10000 clocks
 T1CON = 0x8030; // Timer1 enabled (internal clock divided by 256)
 while(1) asm nop; // Endless loop
}

How does one calculate the period of interrupt requests? Let the internal clock be set to 10MHz. The period is 100ns. Since the clock is divided by 256 (prescaler reduces the clock 1:256) to form the timer clock, it follws that the the timer clock is 100*256=25600ns i.e. 25.6µs. At each 10000 clocks an interrupt is requestd, i.e. at each 256ms or approximately 4 times per second. T = 10000*25.6µs = 256ms ~ ¼s.

4.1.2 16-bit synchronous counter mode

In the 16-bit synchronous counter mode the counter value TMR1 increments on every rising edge of an external clock source. In this mode the phase of the internal clock is synchronized with the external clock. When the value of the TMR1 counter is equal to the preset value of the PR1 register, the counter TMR1 is reset and starts counting from ‘0’. At this moment an interrupt request for timer1 module T1IF (in the register IFS0) is generated. Processing of this request depends on the interrupt T1IE enable bit (in the IEC0 register). Timer module continues to operate during the interrupt routine. The purpose of the timer1 module is to allow measurement of the periods of very fast clock signals, e.g. autodetection of the speed of communication of the universal serial inteface UART. The timer1 module could operate in this mode during IDLE state if bit TSIDL (T1CON<13>) is reset; if this bit is set, the counter continues operation after the processor is waken-up from IDLE state. The following example demonstrates how timer1 module can be used in the synchronous counter mode.

Example:

Count every tenth pulse and increment the value at port D. In this example timer1 is used for counting external clock pulses at pin T1CK. After ten pulses interrupt Timer1Int occurs and the vaule at port D is incremented. Block diagram of Fig. 4-2 shows the interconnection between the timer1 and external clock source.

Fig. 4-2 Block diagram of the connection of an external clock source to dsPIC30F4013

void Timer1Int() org 0x1A{ // Timer1 address in the interrupt vector table
 LATD = ~PORTD; // Value at PORTD is incermented
 IFS0 = IFS0 & 0xFFF7; // Interrupt request is reset
}

void main(){
 TRISD = 0; // PORTD is output
 TRISC = 0x4000; // PORT<14>=1 T1CK input pin
 LATD = 0; // Set initial value at port D
 IPC0 = IPC0 | 0x1000; // Priority level is 1
 IEC0 = IEC0 | 0x0008; // Timer1 interrupt enabled
 PR1 = 10; // Interrupt period is 10 clocks
 T1CON = 0x8006; // Timer1 is synchronous counter of external pulses
 while(1) asm nop; // Endless loop
}

How does one configure timer1 module to operate in the 16-bit synchronous mode? Prescaler ratio 1:1 is selected, external clock TCS=1 is enabled, and operation of timer1 module TON=1 is enabled (T1CON = 0x8006;). By setting bit TRISC<14>=1 the pin PORTC<14>=1 is configured as input.

4.1.3 16-bit asynchronous counter mode

In the 16-bit asynchronous counter mode the counter value TMR1 increments on every rising edge of an external clock source, but the phase of the internal clock is not synchronized with the external clock. When the value of the TMR1 counter is equal to the preset value of the PR1 register, the counter TMR1 is reset and starts counting from ‘0’. At this moment an interrupt request for timer1 module T1IF (in the register IFS0) is generated. Processing of this request depends on the interrupt T1IE enable bit (in the IEC0 register). Timer module continues to operate during the interrupt routine. The timer1 module could operate in this mode during IDLE state if bit TSIDL (T1CON<13>) is reset; if this bit is set, the counter continues operation after the processor is waken-up from IDLE state.

Example:

Count each 800th pulse and increment the value at port D. In this example timer1 is used to count each 8th pulse of an external clock at the external pin T1CK. After 100 pulses the interrupt routine Timer1Int is called and the value at port D is incremented. Block diagram of Fig. 4-3 shows the interconnection between the timer1 and external clock source.

Fig. 4-3 Block diagram of the connection of an external clock source to dsPIC30F4013

void Timer1Int() org 0x1A{ // Timer1 address in the interrupt vector table
 LATD++; // Value at PORTD is incremented
 IFS0 = IFS0 & 0xFFF7; // Interrupt request is reset
}

void main(){
 TRISD = 0; // PORTD is output
 TRISC = 0x4000; // PORT<14>=1 T1CK is input pin
 LATD = 0; // Set initial value at port D
 IPC0 = IPC0 | 0x1000; // Priority level is 1
 IEC0 = IEC0 | 0x0008; // Timer1 interrupt enabled
 PR1 = 100; // Interrupt period is 100 clocks
 T1CON = 0x8012; // Timer1 is synchronous counter of external pulses
 while(1) asm nop; // Endless loop
}

4.1.4 Gated timer mode

When timer1 module operates in the 16-bit timer mode, it can be configured to allow the measurement of duration of an external gate signal (gate time accumulation). In this mode the counter TMR1 is incremented by internal instruction clock (TCY) as long as the external GATE signal (pin T1CK) is at the high logical level. In order that timer1 module operates in this mode it is required that the control bit TGATE (T1CON<6>) is set, internal clock (TCS=0) is selcted, and the operation of the timer is enabled (TON=1). The timer1 module could operate in this mode during IDLE state if bit TSIDL (T1CON<13>) is reset; if this bit is set, the counter continues operation after the processor is waken-up from IDLE state.

Example:

Use timer1 in the gated time accumulation mode.The enable GATE signal is applied to the pin T1CK. Measure the width of the signal and display the result at port D. Block diagram of interconnection of timer1 and an external clock source is shown in Fig. 4-4.

Fig. 4-4 Block diagram of the connection of an external clock source to dsPIC30F4013

void Timer1Int() org 0x1A{// Timer1 address in the interrupt vector table
 LATD = TMR1; // Pulse duration is displayed at port D
 IFS0 = IFS0 & 0xFFF7; // Interrupt request is processed
}

main(){
 TRISD = 0; // PORTD is output
 TRISC = 0x4000; // PORT<14>=1 T1CK is input pin
 LATD = 0; // Set initial value at port D
 IPC0 = IPC0 | 0x1000; // Priority level is 1
 IEC0 = IEC0 | 0x0008; // Timer1 interrupt enabled
 PR1 = 0xFFFF; // Period is maximum
 T1CON = 0x8040; // Timer1 is enabled, internal clock until T1CK=1
 while (1) asm nop; // Endless loop
}

Why the register PR1 is set to the maximum value? The main reason is to allow measurement of as long as possible time intervals, i.e. the interrupt does not come as a consequence of equalisation of the TMR1 and PR1 registers but, if possible, as a consequence of the falling edge of the GATE signal. In the operation of the timer1 module the applications often require the use of the prescaler which allows that the clock can be reduced by the ratio 1:1, 1:8; 1:64, or 1:256. In this way the scope of applications of the timer1 module is widened considerably. The prescaler selection is done by setting the control bits TCKPS<1:> (T1CON<5:4>). The prescaler counter is reset every time of writing in the counter register TMR1, or control register T1CON, or after microcontroller reset. However, it is important to note that the prescaler counter can not be reset when the timer1 module is interrupted (TON=0) since the prescaler clock is stoped.   The operation of the timer1 module in SLEEP mode is possible only if the following conditions are fullfiled:

• the operation of the timer1 module is enabled (TON=1),
• timer1 module uses an external clock,
• control bit TSYNCH (T1CON<2>) is reset defining an asynchronous external clock source. i.e. the clock is independent of the internal microcontroller clock.

In this way it is allowed that the timer1 module continues counting as long as the register TMR1 is equal to the preset (period) register PR1. Then, TMR1 is reset and an interrupt is generated. An interrupt request for the timer1 module, if the enable bit is set, can wake-up the microcontroller from SLEEP mode. The timer1 module generates an interrupt request when the values of the counter register TMR1 and preset (period) register PR1 are equal. The interrupt request is effected by setting bit T1IF in the interrupt register IFS0. If the timer1 module interrupt enable bit T1IE in the interupt register IEC0 is set, an interrupt is generated. The bit T1IF has to be software reset in the interrupt routine. If the timer1 module operates in the gated time accumulation mode, then the interrupt request will be generated at each falling edge of the external GATE signal, i.e. at the end of each accumulation cycle.

4.1.5 Real-Time Clock (RTC) operation mode

The timer1 module can be adjusted to operate in the Real-Time Clock operation mode, i.e. as a real time clock. In this way one obtains the information of the time instants (hours, minutes, seconds) serving for the evidence of events. The main characteristics of the RTC mode of operation of the timer1 module are: use of the 32kHz oscillator, 8-bit prescaler, low power, and the ability of generating an RTC interrupt request. Like all timer1 module operation modes, this mode is set by the control bits in the register T1CON. While the timer1 module uses the clock of the 32kHz oscillator for operation in the RTC mode, the remaining of the microcontroller has the ability to operate with another clock which is adjustable by the control bits in the control register FOSC. In this mode, when the control bits are TON=1, TCS=1, and TGATE=0, the counter register TMR1 is incremented by each rising edge of the 32kHz low power oscillator until the value of the counter register TMR1 is equal to the preset value of the PR1 register; the counter register TMR1 is then reset t? '0'.   With this configured timer1 module, in SLEEP state the TRC will continue operation clocked from the 32kHz oscillator and the control bits will not be changed. When the condition for generation of an interrupt request is fulfilled (TMR1=PR1), the bit T1IF in the interrupt register IFS0 is set. If the corresponding interrupt is enabled (the enable bit T1IE in the IEC0 register is set), an interrupt of the microcontroller is generated. During the interrupt routine the bit T1IF has to be reset, otherwise no other interrupt request could be detected by timer1 module.

Fig. 4-5 Connection of a crystal oscillator in the RTC mode

NAME	ADR	15	14	13	12-7	6	5	4	3	2	1	0	RESET STATE
TMR1	0x0100	Timer 1 Register											0x0000
PR1	0x0102	Period Register 1											0xFFFF
T1CON	0x0104	TON	-	TSIDL	-	TGATE	TCKPS1	TCKPS0	-	TSYNC	TCS	-	0x0000

Table 4-1 Registers of timer1 module

TON – Timer1 module on bit (TON=1 starts timer, TON=0 stops timer)
TSIDL – Stop in IDLE mode bit (TSIDL=1discontinue module operation when 
 microcontroller enters IDLE mode, 
TSIDL = 0 continue module operation in IDLE mode)
TGATE – Timer gated time accumulation mode enable bit (TCS must be set to logic 0 when TGATE=1)
TCKPS<1:0> - Timer input clock prescale select bits
 00 – 1:1 prescale value
 01 – 1:8 prescale value
 10 – 1:64 prescale value
 11 – 1:256 prescale value
TSYNC – Timer external clock input synchronization select bit 
(TSYNC=1 synchronize external clock input, TSYNC=0 do not synchronize external clock input)
TCS – Timer clock source select bit 
(TCS=1 external clock from pin T1CK, TCS=0 internal clock Fosc/4)