Data memory (RAM)serves for storing and keeping data required for the proper operation of the programs. Depending on the program in progress, it can, but does not have to, be split into two sections. For DSP2 instruction set the data memory is considered to consist of two sectioins. The two data spaces are accessed by using two address generation units and separate data paths, i.e. two data can be read or written simultaneously. Chapter 11 gives more details. For other instructions the data memory is considered unique. Structure of the data memory of the dsPIC30F4013 and dsPIC30F6014A devices is shown in Fig. 8-2.

The size of the data memory, similarly to the program memory, depends on the model of dsPIC devices. For dsPIC30F4013 device the data memory has 64K. The addresses are 16-bit, i.e. no more than 64K addresses can be generated. All data memory addresses are even. An attempt to access an odd address will result in device reset. The first 2K locations are reserved for the Special Function Registers (SFR) and general purposes (1K 16-bit locations). These registers contain the control and status bits of the device. From the address 0x0800 the RAM is divided into two sections, X and Y. This division is essential only for DSP instructions. For other applications only the total size matters (e.g. for dsPIC30F4013 this size is 2KB). Writing to the RAM is performed as if this division did not exist for both DSP instructions and others. Only when reading DSP instructions this division is used to read two memory locations simultaneously. This access to the memory speeds up considerably the execution of DSP instructions which have been optimized for signal processing, which most of the time requires calculation of the sums of products of two arrays (the so called MAC istructiuons - Multiply and Add to Accumulator). This requires fast reading of both operands to be multiplied and the result added to the previous value (accumulation).