The following text describes the core SFRs of the PIC16F887 microcontroller. Their bits control different modules within the chip and therefore are described along with processes they are in control of.
CLRWDTinstruction which resets the watch-dog timer or the SLEEP instruction which sets the microcontroller to the low-consumption mode.
CLRWDTinstruction which resets the watch-dog timer.
SLEEPinstruction which sets the microcontroller to the low-consumption mode.
' If the CLRWDT command is not executed, WDT will reset the microcontroller every 32.768 uS ' (f=4 MHz) OPTION_REG = %00001111 ' Prescaler is assigned to WDT (1:128) asm CLRWDT ' Assembly command to reset WDT end asm ... ' Time between these two CLRWDT commands must not exceed 32.768 microseconds (128x256) CLRWDT ' Assembly command to reset WDT ... ... ' Time between these two CLRWDT commands must not exceed 32.768 microseconds (128x256) CLRWDT ' Assembly command to reset WDT ...
' The PORTB.4 pin is configured as an input sensitive to logic state change ANSEL, ANSELH = 0 ' All I/O pins are configured as digital PORTB = 0 ' All PORTB pins are cleared TRISB = %00010000 ' All PORTB pins except PORTB.4 are configured as outputs INTCON.RBIE = 1 ' Interrupts on PORTB change are enabled IOCB.IOCB4 = 1 ' Interrupt on PORTB pin4 change is enabled INTCON.GIE = 1 ' Global interrupt is enabled ... ... 'From this point, any change of the PORTB.4 pin logic state will cause an interrupt
'Each Timer1 register (TMR1H and TMR1L) overflow causes an interrupt to occur. In every 'interrupt rutine, variable cnt will be incremented by 1. dim unsigned short cnt ' Define variable cnt sub procedure interrupt cnt = cnt + 1 ' Interrupt causes cnt to be incremented by 1 PIR1.TMR1IF = 0 ' Reset bit TMR1IF TMR1H = 0x80 ' TMR1H and TMR1L timer registers return TMR1L = 0x00 ' their initial values end sub main: ANSEL, ANSELH = 0 ' All I/O pins are configured as digital T1CON = 1 ' Turn on Timer1 PIR1.TMR1IF = 0 ' Reset the TMR1IF bit TMR1H = 0x80 ' Set initial value for Timer1 TMR1L = 0x00 PIE1.TMR1IE = 1 ' Enable an interrupt on overflow cnt = 0 ' Reset variable cnt INTCON = 0xC0 ' Enable interrupt (bits GIE and PEIE) ...
' Comparator C2 is configured to use pins RA0 and RA2 as inputs. Every change on ' the comparator's output will cause the PORTB.1 output pin to change its logic ' state in interrupt routine. sub procedure interrupt PORTB.F1 = not PORTB.F1 ' Interrupt will invert logic state of the PORTB.1 pin PIR2.C2IF = 0 ' Interrupt flag bit C2IF is cleared end sub main: TRISB = 0 ' All PORTB pins are configured as outputs PORTB.1 = 1 ' Pin PORTB.1 is set ANSEL = %00000101 ' RA0/C12IN0- and RA2/C2IN+ pins are analog inputs ANSELH = 0 ' All other I/O pins are configured as digital CM2CON0.C2CH0 = 0 ' The RA0 pin is selected to be C2 inverting input CM2CON0.C2CH1 = 0 PIE2.C2IE = 1 ' Enables comparator C2 interrupt INTCON.GIE = 1 ' Global interrupt is enabled CM2CON0.C2ON = 1 ' Comparator C2 is enabled ... ...
' Module ULPWU activation sequence main: PORTA.0 = 1 ' PORTA.0 pin is set ANSEL,ANSELH = 0 ' All I/O pins are configured as digital TRISA = 0 ' PORTA pins are configured as outputs Delay_ms(1) ' Charge capacitor PIR2.ULPWUIF = 0 ' Clear flag PCON.ULPWUE = 1 ' Enable ULP Wake-up TRISA.0 = 1 ' PORTA.0 is configured as an input PIE2.ULPWUIE = 1 ' Enable interrupt INTCON.GIE = 1 ' Enable all unmasked interrupts INTCON.PEIE = 1 ' Enable peripheral interrupt asm ' Asm instruction SLEEP ' Go to sleep mode ...
GOTO),the microcontroller is capable of providing 11-bit address only. Similar to RAM, which is divided in ‘banks’, ROM is divided in four ‘pages’ of 2K each. Such instructions are properly executed within these boundaries. Simply put, since the processor deals with 11-bit address, it is capable of addressing any location within 2KB.
RETFIE(return to the main program), the microcontroller will simply proceed with the program execution from where it left off because the return address is pushed onto the stack which, as mentioned before, consists of 13-bit registers.