Like all models belonging to the 8051 series, this microcontroller can operate in 1 out of 3 modes: normal (consumption ca. 25 mA), Idle(consumption ca. 6.5 mA) and Power Down (consumption ca. 40 uA). The mode of operation is selected by bits of the PCON register (Power Control Register). Three bits are changed compared to the basic model:

PCON register The purpose of the bits of the PCON register: SMOD1 When set, this bit makes boud rate twice as high. SMOD0 Bit determines the purpose of the 7th bit of the SCON register:

• 0 Seventh bit of the SCON register has the function of SM0, i.e. selects mode of operation.
• 1 Seventh bit has the function of FE, i.e. detects errors. It is rarely used.

POF Bit is automatically set when the voltage level reaches maximum (must be higher than 3V) after powering on. It is used for detecting cause for reset (power on or restart condition after exiting Power Down mode). GF1 General purpose bit (available for use). GF0 General purpose bit (available for use). PD By setting this bit, the microcontroller is set in Power Down mode. IDL By setting this bit, the microcontroller is set in Idle mode.

When something goes wrong...

If something unexpected happens during the operation of the microcontroller, what most bothers is the fact that it’s never the microcontroller's fault. Although it’s not self-evident, the microcontroller always obediently follows program instructions. For this reason, it is necessary to pay special attention to several “critical points” when writing a program. The first one is RAM memory. Even though it is designed to meet needs of the majority of users and has all required, a memory space intended for RAM is still only a single entity. It means that there are no phisically separated registers R0-R7, general purpose registers, stack etc. Instead, these are differently designated parts of the same “memory shelf”. Refer to the figure below. If we neglect this “detail”, there is a risk that the program suddenly starts to perform unpredictably. In order to prevent it, it is necessary to take care of the following: If only registers R0-R7 from bank 0 are in use, everything is easily kept under control and program memory locations from 08h to 1Fh are available for use. If registers, otherwise having the same names, from some other bank are in use, you should be careful when using locations whose addresses are less than 20h because it can cause “R” registers to be erased. If bit-variables are not used in the program, program memory locations 20h-2Fh are available for use. If the program contains bit-variables, you should be careful when using these location in order not to change them accidentaly. By default, the data pushed onto stack occupy program memory locations starting from 08h. If the banks 1, 2 or 3 are in use, their contents will be certainly erased. For this reason, it is recommended to set the Stack Pointer value to be greater than 20h or even greater at the beginning of the program. SFRs are used for controlling the microcontroller operation. Each of them has its specific purpose and it should be observed. It means that they cannot be used as general purpose registers even in the event that some of their locations is not occupied. Instruction set, recognized by the microcontroller, contains instructions which can be used for controlling individual bits of registers at program memory location 20h-7Fh. Besides, individual bits of some SFRs (not all of them) can also be directly accessed. Addresses of these registers are divisible by 8. If memory is expanded by adding external RAM or ROM memory chip, ports P0 and P2 are not available for use regardless of how many pins are actually used for memory expansion. The DPTR register is a 16-bit register comprised of registers DPH and DPL which are 8-bit wide each. The DPTR register should be considered like that practically. For example, when pushing it onto the Stack, DPL should be pushed first, then DPH. When used, serial communication is under control of the SCON register. Besides, registers TCON and TMOD should be configured for this purpose as well since the timer T1 is mostly used for boud rate generation. When some of the interrupts is enabled, you should be careful because there is a risk that program starts to perform unexpectedly. When an interrupt request arrives, the microcontroller will execute instruction in progress, push the address of the first following location onto the stack (in order to know from where to continue) and jump to the specified interrupt routine address. When the routine has been executed, the microcontroller will pop the address from the stack and continue from where it left off. However... The microcontroller saves only the address to continue from after routine execution. What is usually neglected is the fact that the contents of many registers can be changed during routine execution. The program normally procedees with execution considering the changed registers correct if their original vaules haven't been saved, thus causing a total chaos. The worst thing is that this problem can be manifested anytime: at the moment or several days later (depending on the moment an interrupt occurs). Obviously, the only solution is to save the state of all important registers at the beginning of interrupt routine and to update these values before returning to the program. We are actually talking about the following registers:

• PSW
• DPTR (DPH, DPL)
• ACC
• B
• Registers R0 - R7

Note: Contents of registers are usually saved by being pushed onto the Stack using the PUSH instruction. However, instructions such as “PUSH R0” cannot be used here because the microcontroller “doesn’t know” which register is concerned as there are 4 banks with registers haing the same names R0-R7. For this reason, it is necessary to save addresses of these registers instead of their names using the PUSH 00h instruction. When some of the instructions for indirect addressing is used, you should be careful not to use them for accessing SFRs as the microcontroller ignores their addresses and accesses free RAM locations having the same addresses as SFRs. When UART system for serial communication is used, setting bits RI and TI of the SCON register generated the same interrupt. If such an interrupt is generated, it is first necessary to detect interrupt source (byte is sent, received or both). It is important to remember that the microcontroller only sets these bits so that they must be cleared from within the program. Otherwise, the program gets stuck and executes the same interrupt routine over and over again.

A list of bit-addressable registers

Accumulator (Address: E0)

ACC
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-
	Bit address	E7	E6	E5	E4	E3	E2	E1	E0

B register (Address: F0)

B
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-
	Bit address	F7	F6	F5	F4	F3	F2	F1	F0

Interrupt Priority register (Address: B8)

IP
	After reset	X	X	0	0	0	0	0	0
	Bit name	-	-	PT2	PS	PT1	PX1	PT0	PX0
	Bit address	BF	BE	BD	BC	BB	BA	B9	B8

Interrupt Enable register (Address: A8)

IE
	After reset	0	X	0	0	0	0	0	0
	Bit name	EA	-	ET2	ES	ET1	EX1	ET0	EX0
	Bit address	AF	AE	AD	AC	AB	AA	A9	A8

Port 0 (Address: 80)

P0
	After reset	1	1	1	1	1	1	1	1
	Bit name	-	-	-	-	-	-	-	-
	Bit address	87	86	85	84	83	82	81	80

Port 1 (Address: 90)

P1
	After reset	1	1	1	1	1	1	1	1
	Bit name	-	-	-	-	-	-	-	-
	Bit address	97	96	95	94	93	92	91	90

Port 2 (Address: A0)

P2
	After reset	1	1	1	1	1	1	1	1
	Bit name	-	-	-	-	-	-	-	-
	Bit address	A7	A6	A5	A4	A3	A2	A1	A0

Port 3 (Address: B0)

P3
	After reset	1	1	1	1	1	1	1	1
	Bit name	-	-	-	-	-	-	-	-
	Bit address	B7	B6	B5	B4	B3	B2	B1	B0

Program Status Word (Address: D0)

PSW
	After reset	0	0	0	0	0	0	0	0
	Bit name	CY	AC	F0	RS1	RS0	OV	-	P
	Bit address	D7	D6	D5	D4	D3	D2	D1	D0

Serial Port Control register (Address: 98)

SCON
	After reset	0	0	0	0	0	0	0	0
	Bit name	SM0	SM1	SM2	REN	TB8	RB8	TI	RI
	Bit address	9F	9E	9D	9C	9B	9A	99	98

Timer Control register (Address: 88)

TCON
	After reset	0	0	0	0	0	0	0	0
	Bit name	TF1	TR1	TF0	TR0	IF1	IT1	IF0	IT0
	Bit address	8F	8E	8D	8C	8B	8A	89	88

Timer/Counter 2 Control register (Address: C8)

T2CON
	After reset	0	0	0	0	0	0	0	0
	Bit name	TF2	EXF2	RCLK	TCLK	EXEN2	TR2	C/T2	CP/RL2
	Bit address	CF	CE	CD	CC	CB	CA	C9	C8

A list of non bit-addressable registers

Auxiliary register (Address: 8E)

AUXR
	After reset	X	X	X	X	X	X	X	0
	Bit name	-	-	-	-	-	-	Intel_Pwd_Exit	DISALE

Clock register (Address: 8F)

CLKREG
	After reset	X	X	X	X	X	X	X	0
	Bit name	-	-	-	-	-	-	-	X2

Data Pointer 0 High (Address: 83)

DP0H
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Data Pointer 0 Low (Address: 82)

DP0L
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Data Pointer 1 High Byte (Address: 85)

DP1H
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Data Pointer 1 Low Byte (Address: 84)

DP1L
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

EEPROM Control (Address: 96)

EECON
	After reset	X	X	0	0	0	0	1	1
	Bit name	-	-	EELD	EEMWE	EEMEN	DPS	RDY/BSY	WRTINH

Interrupt Priority High Byte (Address: B7)

IPH
	After reset	X	X	0	0	0	0	1	1
	Bit name	-	-	PT2H	PSH	PT1H	PX1H	PT0H	PX0H

Power Control (Address: 87)

PCON
	After reset	0	X	X	X	0	0	0	0
	Bit name	SMOD	-	-	-	GF1	GF0	PD	IDL

Slave Address (Address: A9)

SADDR
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Slave Address Enable (Address: B9)

SADEN
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Serial buffer (Address: 99)

SBUF
	After reset	X	X	X	X	X	X	X	X
	Bit name	-	-	-	-	-	-	-	-

Stack Pointer (Address: 81)

SP
	After reset	0	0	0	0	0	1	1	1
	Bit name	-	-	-	-	-	-	-	-

SPI Control register (Address: D5)

SPCR
	After reset	0	0	0	0	0	1	0	0
	Bit name	SPIE	SPE	DORD	MSTR	CPOL	CPHA	SPR1	SPR0

SPI Data register (Address: 86)

SPDR
	After reset	-	-	-	-	-	-	-	-
	Bit name	-	-	-	-	-	-	-	-

SPI Status register (Address: AA)

SPSR
	After reset	0	0	0	-	-	-	0	0
	Bit name	SPIF	WCOL	LDEN	-	-	-	DISSO	ENH

Timer 2 Reload Capture High (Address: CB)

RCAP2H
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Timer 2 Reload Capture Low (Address: CA)

RCAP2L
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Timer 0 Low (Address: 8A)

TL0
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Timer 1 Low (Address: 8B)

TL1
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Timer 2 Low (Address: CC)

TL2
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Timer 0 High Byte (Address: 8C)

TH0
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Timer 1 High Byte (Address: 8D)

TH1
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Timer 2 High Byte (Address: CD)

TH2
	After reset	0	0	0	0	0	0	0	0
	Bit name	-	-	-	-	-	-	-	-

Timer Mode (Address: 89)

TMOD
	After reset	0	0	0	0	0	0	0	0
	Bit name	GATE1	C/T1	T1M1	T1M0	GATE0	C/T0	T0M1	T0M0

Timer 2 Mode Control (Address: C9)

T2MOD
	After reset	X	X	X	X	X	X	0	0
	Bit name	-	-	-	-	-	-	T2OE	DCEN

Watchdog Timer Control (Address: A7)

WDTCON
	After reset	0	0	0	0	0	0	0	0
	Bit name	PS2	PS1	PS0	WDIDLE	DISRTO	HWDT	WSWRST	WDTEN

Watchdog Timer Reset (Address: A6)

WDTCON
	After reset	-	-	-	-	-	-	-	-
	Bit name	-	-	-	-	-	-	-	-

Voltage characteristics of the AT89S8253 microcontrollers

SYMBOL	PARAMETER	CONDITION	MIN.	MAX.
VIL	Input Low-voltage	All pins except EA	-0.5 V	0.2Vcc - 0.1V
VIL1	Input Low-voltage on EA pin		-0.5 V	0.2Vcc - 0.3V
VIH	Input High-voltage	All pins except XTAL1 and RST	0.2 Vcc + 0.9V	Vcc + 0.5 V
VIH1	Input High-voltage on pins XTAL1 and RST		0.7 Vcc	Vcc + 0.5 V
VOL	Output High-voltage	Iol = 10mA, Vcc = 4.0V, Ta = 85°C		0.4 V
VOH1	Output High-voltage when Pull-up resistors are enabled (Port P0 in External BUS mode, ports P1,2,3, pins ALE and PSEN)	Ioh = -40mA, Ta = 85°C Ioh = -25mA, Ta = 85°C Ioh = -10mA, Ta = 85°C	2.4 V 0.75 Vcc 0.9 Vcc
IIL	Logical 0 input current (ports P1,2,3)	Vin = 0.45V, Vcc = 5.5V, Ta = -40°C		- 50 μA
IILI	Input leakage current (port P0, pin EA)	0.45V < Vin < Vcc		± 10 μA
RRST	Reset pull-down resistor		50 KΩ	150 KΩ
CIO	I/O pin Capacitance	f = 1Mhz, Ta = 25°C		10 pF
ICC
	Power-supply current	Normal mode: f = 12Mhz, Vcc = 5.5V Ta = -40°C Idlle mode f = 12Mhz, Vcc = 5.5V Ta = -40°C		25 mA 6.5 mA
	Power-down mode	Vcc = 5.5V Ta = -40°C Vcc = 4V Ta = -40°C		100 μA 40 μA