Here is a list of the operands and their meanings:
addr1: Subroutine address
.Description: Instruction unconditionally calls a subroutine located at the specified code address. Therefore, the current address and the address of called subroutine must be within the same 2K byte block of the program memory, starting from the first byte of the instruction following ACALL. Syntax: ACALL [subroutine name]; Bytes: 2 (instruction code, subroutine address); STATUS register flags: No flags are affected. EXAMPLE:A: accumulator Rn: any R register (R0-R7)
Description: Instruction adds the register Rn (R0-R7) to the accumulator. After addition, the result is stored in the accumulator. Syntax: ADD A,Rn; Byte: 1 (instruction code); STATUS register flags: C, OV and AC; EXAMPLE:A: accumulator Ri: Register R0 or R1
Description: Instruction adds the indirect RAM to the accumulator. Address of indirect RAM is stored in the Ri register (R0 or R1). After addition, the result is stored in the accumulator. Syntax: ADD A,@Ri; Byte: 1 (instruction code); STATUS register flags: C, OV and AC; EXAMPLE:A: accumulator Direct: Arbitrary register with address 0 - 255 (0 - FFh)
Description: Instruction adds the direct byte to the accumulator. As it is direct addressing, the direct can be any SFR or general-purpose register with address 0-7 Fh. The result is stored in the accumulator. Syntax: ADD A, register name; Bytes: 2 (instruction code, direct byte address); STATUS register flags: C, OV and AC; EXAMPLE:A: accumulator Rn: any R register (R0-R7)
Description: Instruction adds the accumulator with a carry flag and Rn register (R0-R7). After addition, the result is stored in the accumulator. Syntax: ADDC A,Rn; Byte: 1 (instruction code); STATUS register flags: C, OV and AC; EXAMPLE:A: accumulator
Data: constant within 0-255 (0-FFh)
Description: Instruction adds data (0-255) to the accumulator. After addition, the result is stored in the accumulator. Syntax: ADD A,#data; Bytes: 2 (instruction code, data); STATUS register flags: C, OV and AC; EXAMPLE:A: accumulator
Direct: arbitrary register with address 0-255 (0-FFh)
Description: Instruction adds the direct byte to the accumulator with a carry flag. As it is direct addressing, the register can be any SFRs or general purpose register with address 0-7Fh (0-127dec.). The result is stored in the accumulator. Syntax: ADDC A, register address; Bytes: 2 (instruction code, direct); STATUS register flags: C, OV and AC; EXAMPLE:A: accumulator
Ri: Register R0 or R1
Description: Instruction adds the indirect RAM to the accumulator with a carry flag. RAM address is stored in the Ri register (R0 or R1). After addition, the result is stored in the accumulator. Syntax: ADDC A,@Ri; Byte: 1 (instruction code); STATUS register flags: C, OV and AC; EXAMPLE:A: accumulator
Data: constant with address 0-255 (0-FFh)
Description: Instruction adds data (0-255) to the accumulator with a carry flag. After addition, the result is stored in the accumulator. Syntax: ADDC A,#data; Bytes: 2 (instruction code, data); STATUS register flags: C, OV and AC; EXAMPLE:addr11: Jump address
Description: Program continues execution after executing a jump to the specified address. Similar to the ACALL instruction, the jump must be executed within the same 2K byte block of program memory starting from the first byte of the instruction following AJMP. Syntax: AJMP address (label); Bytes: 2 (instruction code, jump address); STATUS register flags: No flags are affected; EXAMPLE:A: accumulator
Rn: any R register (R0-R7)
Description: Instruction performs logic AND operation between the accumulator and Rn register. The result is stored in the accumulator. Syntax: ANL A,Rn; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:A: accumulator
Direct: arbitrary register with address 0 - 255 (0 - FFh)
Description: Instruction performs logic AND operation between the accumulator and drect register. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh (o-127 dec.). The result is stored in the accumulator. Syntax: ANL A,direct; Byte: 2 (instruction code, direct); STATUS register flags: No flags are affected; EXAMPLE:A: accumulator
Ri: Register R0 or R1
Description: Instruction performs logic AND operation between the accumulator and register. As it is indirect addressing, the register address is stored in the Ri register (R0 or R1). The result is stored in the accumulator. Syntax: ANL A,@Ri; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:Direct: arbitrary register with address 0-255 (0-FFh)
A: accumulator
Description: Instruction performs logic AND operation between direct byte and accumulator. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh (0-127 dec.). The result is stored in the direct byte. Syntax: ANL register address,A; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected. EXAMPLE:Direct: Arbitrary register with address 0 - 255 (0 - FFh)
Data: constant in the range between 0-255 (0-FFh)
Description: Instruction performs logic AND operation between direct byte and data. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh (0-127 dec.). The result is stored in the direct byte. Syntax: ANL register address ,#data; Bytes: 3 (instruction code, direct byte address, data); STATUS register flags: No flags are affected; EXAMPLE:C: Carry flag Bit: any bit of RAM
Description: Instruction performs logic AND operation between the direct bit and the carry flag.BIT | C | C AND BIT |
---|---|---|
0 | 0 | 0 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 1 |
C: carry flag Bit: any bit of RAM
Description: Instruction performs logic AND operation between inverted addressed bit and the carry flag. The result is stored in the carry flag.BIT | BIT | C | C AND BIT |
---|---|---|---|
0 | 1 | 0 | 0 |
0 | 1 | 1 | 1 |
1 | 0 | 0 | 0 |
1 | 0 | 1 | 0 |
A: accumulator
Direct: arbitrary register with address 0-255 (0-FFh)
addr: jump address
Description: Instruction first compares the number in the accumulator with the directly addressed byte. If they are equal, the program proceeds with execution. Otherwise, a jump to the specified address will be executed. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-128 to +127 locations relative to the first following instruction). Syntax: CJNE A,direct,[jump address]; Bytes: 3 (instruction code, direct byte address, jump address); STATUS register flags: C; EXAMPLE:A: accumulator
Data: constant in the range of 0-255 (0-FFh)
Description: Instruction first compares the number in the accumulator with the immediate data. If they are equal, the program proceeds with execution. Otherwise, a jump to the specified address will be executed. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-128 to +127 locations relative to the first following instruction). Syntax: CJNE A,X,[jump address]; Bytes: 3 (instruction code, data, jump address); STATUS register flags: C; EXAMPLE:Rn: Any R register (R0-R7)
Data: Constant in the range of 0 - 255 (0-FFh)
addr: Jump address
Description: Instruction first compares immediate data to the register Rn. If they are equal, the program proceeds with execution. Otherwise, a jump to the specified address will be executed. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-128 to + 127 locations relative to the first following instruction). Syntax: CJNE Rn,data,[jump address]; Bytes: 3 (instruction code, data, jump address); STATUS register flags: C; EXAMPLE:Ri: Register R0 or R1
Data: Constant in the range of 0 - 255 (0-FFh)
Description: This instruction first compares immediate data to indirectly addressed register. If they are equal, the program proceeds with execution. Otherwise, a jump to the specified address in the program will be executed. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-128 to +127 locations relative to the next instruction). Syntax: CJNE @Ri,data,[jump address]; Bytes: 3 (instruction code, data, jump address); STATUS register flags: C; EXAMPLE:A: accumulator
Description: Instruction clears the accumulator. Syntax: CLR A; Byte: 1 (instruction code); STATUS register flags: No flags are affected. EXAMPLE:C: Carry flag
Description: Instruction clears the carry flag. Syntax: CLR C; Byte: 1 (instruction code); STATUS register flags: C; EXAMPLE:Bit: any bit of RAM
Description: Instruction clears the specified bit. Syntax: CLR [bit address]; Bytes: 2 (instruction code, bit address); STATUS register flags: No flags are affected. EXAMPLE:A: accumulator
Description: Instruction complements all the bits in the accumulator (1==>0, 0==>1). Syntax: CPL A; Bytes: 1 (instruction code); STATUS register flags: No flags are affected. EXAMPLE:Bit: any bit of RAM
Description: Instruction coplements the specified bit of RAM (0==>1, 1==>0). Syntax: CPL [bit address]; Bytes: 2 (instruction code, bit address); STATUS register flags: No flags are affected; EXAMPLE:C: Carry flag
Description: Instruction complements the carry flag (0==>1, 1==>0). Syntax: CPL C; Byte: 1 (instruction code); STATUS register flags: C; EXAMPLE:A: accumulator
Description: Instruction adjusts the contents of the accumulator to correspond to a BCD number after two BCD numbers have been added by the ADD and ADDC instructions. The result in form of two 4-digit BCD numbers is stored in the accumulator. Syntax: DA A; Byte: 1 (instruction code); STATUS register flags: C; EXAMPLE:A: accumulator
Description: Instruction decrements the value in the accumulator by 1. If there is a 0 in the accumulator, the result of the operation is FFh. (255 dec.) Syntax: DEC A; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:Rn: any R register (R0-R7)
Description: Instruction decrements the value in the Rn register by 1. If there is a 0 in the register, the result of the operation will be FFh. (255 dec.) Syntax: DEC Rn; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:Direct: arbitrary register with address 0-255 (0-FFh)
Description: Instruction decrements the value of directly addressed register by 1. As it is direct addressing, the register must be within the first 255 locations of RAM. If there is a 0 in the register, the result will be FFh. Syntax: DEC [register address]; Byte: 2 (instruction code, direct); STATUS register flags: No flags are affected; EXAMPLE:A: accumulator
B: Register B
Description: Instruction divides the value in the accumulator by the value in the B register. After division the integer part of result is stored in the accumulator while the register contains the remainder. In case of dividing by 1, the flag OV is set and the result of division is unpredictable. The 8-bit quotient is stored in the accumulator and the 8-bit remainder is stored in the B register. Syntax: DIV AB; Byte: 1 (instruction code); STATUS register flags: C, OV; EXAMPLE:Ri: Register R0 or R1
Description: This instruction decrements the value in the indirectly addressed register of RAM by 1. The register address is stored in the Ri register (R0 or R1). If there is a 0 in the register, the result will be FFh. Syntax: DEC @Ri; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:Direct: arbitrary register with address 0-255 (0-FFh) addr: Jump address
Description: This instruction first decrements value in the register. If the result is 0, the program proceeds with execution. Otherwise, a jump to the specified address in the program will be executed. As it is direct addressing, the register must be within the first 255 locations of RAM. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-128 to +127 locations relative to the first following instruction). Syntax: DJNZ direct,[jump address]; Bytes: 3 (instruction code, direct, jump address); STATUS register flags: No flags are affected; EXAMPLE:Rn: any R register (R0-R7)
addr: jump address
Description: This instruction first decrements the value in the Rn register. If the result is 0, the program proceeds with execution. Otherwise, a jump to the specified address in the program will be executed. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (- 128 to +127 locations relative to the first following instruction). Syntax: DJNZ Rn, [jump address]; Bytes: 2 (instruction code, jump address); STATUS register flags: No flags are affected; EXAMPLE:Rn: any R register (R0-R7)
Description: Instruction increments the value in the Rn register by 1. If the register includes the number 255, the result of the operation will be 0. Syntax: INC Rn; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:A: accumulator
Description: This instruction increments the value in the accumulator by 1. If the accumulator includes the number 255, the result of the operation will be 0. Syntax: INC A; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:Ri: Register R0 or R1
Description: This instruction increments the value in the directly addressed register of RAM by 1. The register address is stored in the Ri Register (R0 or R1). If the register includes the number 255, the result of the operation will be 0. Syntax: INC @Ri; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:Direct: arbitrary register with address 0-255 (0-FFh)
Description: Instruction increments the direct byte by 1. If the register includes the number 255, the result of the operation will be 0. As it is direct addressing, the register must be within the first 255 RAM locations. Syntax: INC direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:addr: Jump address Bit: any bit of RAM
Description: If the bit is set, a jump to the specified address will be executed. Otherwise, if the value of bit is 0, the program proceeds with the next instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-128 to + 127 locations relative to the first following instruction). Syntax: JB bit, [jump address]; Bytes: 3 (instruction code, bit address, jump address); STATUS register flags: No flags are affected; EXAMPLE:DPTR: Data Pointer
Description: Instruction increments the value of the 16-bit data pointer by 1. This is the only 16-bit register upon which this operation can be performed. Syntax: INC DPTR; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:addr: Jump address
Description: Instruction first checks if the carry flag is set. If set, a jump to the specified address is executed. Otherwise, the program proceeds with the next instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-129 to + 127 locations relative to the first following instruction). Syntax: JC [jump address]; Bytes: 2 (instruction code, jump value); STATUS register flags: No flags are affected; EXAMPLE:Bit: any bit of RAM addr: Jump Address
Description: This instruction first checks if the bit is set. If set, a jump to the specified address is executed and the bit is cleared. Otherwise, the program proceeds with the first following instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-129 to + 127 locations relative to the first following instruction). Syntax: JBC bit, [jump address]; Bytes: 3 (instruction code, bit address, jump address); STATUS register flags: No flags are affected; EXAMPLE:addr: Jump address Bit: any bit of RAM
Description: If the bit is cleared, a jump to the specified address will be executed. Otherwise, if the bit value is 1, the program proceeds with the first following instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-129 to + 127 locations relative to the first following instruction). Syntax: JNB bit,[jump address]; Bytes: 3 (instruction code, bit address, jump address); STATUS register flags: No flags are affected; EXAMPLE:A: accumulator
DPTR: Data Pointer
Description: This instruction causes a jump to the address calculated by adding value stored in the accumulator to the 16-bit number in the DPTR Register. It is used with complex program branching where the accumulator affects jump address, for example when reading a table. Neither accumulator nor DPTR register are affected. Syntax: JMP @A+DPTR; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:addr: Jump Address
Description: This instruction checks if the value stored in the accumulator is 0. If not, a jump to the specified address will be executed. Otherwise, the program proceeds with the first following instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-129 to + 127 locations relative to the first following instruction). Syntax: JNZ [jump address]: Bytes: 2 (instruction code, jump value); STATUS register flags: No flags are affected; EXAMPLE:addr: Jump Address
Description: This instruction first checks whether the carry flag is set. If not, a jump to the specified address will be executed. Otherwise, the program proceeds with the first following instruction. This is a short jump instruction, which means that the address of a new location must be relatively near the current one (-129 to + 127 locations relative to the first following instruction). Syntax: JNC [jump address]; Bytes: 2 (instruction code, jump value); STATUS register flags: No flags are affected; EXAMPLE:addr16: Subroutine Address
Description: This instruction unconditionally calls a subroutine located at the specified address. The current address and the start of the subroutine called can be located anywhere within the memory space of 64K. Syntax: LCALL [subroutine name]; Bytes: 3 (instruction code, address (15-8), address (7-0)); STATUS register flags: No flags are affected; EXAMPLE:Rn: any R register (R0-R7) A: accumulator
Description: The instruction moves the Rn register to the accumulator. The Rn register is not affected. Syntax: MOV A,Rn; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:addr16: jump address
Description: Instruction causes a jump to the specified 16-bit address. Syntax: LJMP [jump address]; Bytes: 3 (instruction code, address (15-8), address (7-0)); STATUS register flags: No flags are affected; EXAMPLE:Ri: Register R0 or R1 A: accumulator
Description: Instruction moves the indirectly addressed register of RAM to the accumulator. The register address is stored in the Ri register (R0 or R1). The result is stored in the accumulator. The register is not affected. Syntax: MOV A,@Ri; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:Direct: arbitrary register with address 0-255 (0-FFh)
A: accumulator
Description: Instruction moves the direct byte to the accumulator. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). After executing the instruction, the register is not affected. Syntax: MOV A,direct; Byte: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:Rn: any R register (R0-R7) A: accumulator
Desription: Instruction moves the accumulator to the Rn register. The accumulator is not affected. Syntax: MOV Rn,A; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:A: accumulator
Data: Constant in the range of 0-255 (0-FFh)
Desription: Instruction moves the immediate data to the accumulator. Syntax: MOV A,#data; Bytes: 2 (instruction code, data); STATUS register flags: No flags are affected; EXAMPLE:Rn: any R register (R0-R7)
Data: Constant in the range of 0-255 (0-FFh)
Description: Instruction moves the immediate data to the Rn register. Syntax: MOV Rn,#data; Bytes: 2 (instruction code, data); STATUS register flags: No flags are affected; EXAMPLE:Rn: Any R registar (R0-R7)
Direct: arbitrary register with address 0-255 (0-FFh)
Description: Instruction moves the direct byte to the Rn register. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). After executing the instruction, the register is not affected. Syntax: MOV Rn,direct; Bytes: 2 (instruction code, direct); STATUS register flags: No flags are affected; EXAMPLE:Rn: any R register (R0-R7)
Direct: arbitrary register with address 0-255 (0 - FFh)
Description: Instruction moves the Rn register to the direct byte. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). After executing the instruction, the register is not affected. Syntax: MOV direct,Rn; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:Direct: arbitrary register with address 0-255 (0 - FFh)
A: accumulator
Description: Instruction moves the accumulator to the direct byte. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). After executing the instruction, the register is not affected. Syntax: MOV direct,A; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:Direct: arbitrary register with address 0-255 (0 - FFh)
Ri: Register R0 or R1
Description: Instruction moves the indirectly adressed register of RAM to the direct byte. The register is not affected. Syntax: MOV direct,@Ri; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:Direct: Arbitrary register with address 0-255 (0-FFh)
Direct: Arbitrary register with address 0-255 (0-FFh)
Description: Instruction moves the direct byte to another direct byte. As it is direct addressing, both registers can be any SFRs or general-purpose registers with address 0-7Fh. (0-127 dec.). The direct1 is not affected. Syntax: MOV direct1,direct2; Bytes: 3 (instruction code, direct1 address, direct2 address); STATUS register flags: No flags are affected. EXAMPLE:A: accumulator
Ri: register R0 or R1
Description: Instruction moves the accumulator to the indirectly addressed register of RAM. The register address is stored in the Ri register (R0 or R1). After executing the instruction, the accumulator is not affected. Syntax: MOV @Ri,A; Byte: 1 (instruction code); STATUS register flags: No flags are affected; EXAMPLE:Direct: Arbitrary register with address 0-255 (0-FFh)
Data: Constant in the range of 0-255 (0-FFh)
Description: Instruction moves the immediate data to the direct byte. As it is direct addressing, the direct byte can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). Syntax: MOV direct,#data; Bytes: 3 (instruction code, direct byte address, data); STATUS register flags: No flags are affected; EXAMPLE:Ri: Register R0 or R1
Data: Constant in the range of 0-255 (0-FFh)
Description: Instruction moves the immediate data to the idirectly addressed register of RAM. The register address is stored in the Ri register (R0 or R1). Syntax: MOV @Ri,#data; Bytes: 2 (instruction code, data); STATUS register flags: No flags are affected; EXAMPLE:Direct: Arbitrary register with address 0-255 (0-FFh)
Ri: Register R0 or R1
Description: Instruction moves the direct byte to a register the address of which is stored in the Ri register (R0 or R1). After executing the instruction, the direct byte is not affected. Syntax: MOV @Ri,direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags are affected; EXAMPLE:C: Carry flag
Bit: any bit of RAM
Description: Instruction moves the carry flag to the direct bit. After executing the instruction, the carry flag is not affected. Syntax: MOV bit,C; Bytes: 2 (instruction code, bit address); STATUS register flags: No flags are affected; EXAMPLE:C: Carry flag
Bit: any bit of RAM
Description: Instruction moves the direct bit to the carry flag. After executing the instruction, the bit is not affected. Syntax: MOV C,bit; Bytes: 2 (instruction code, bit address); STATUS register flags: C; EXAMPLE:A: accumulator
DPTR: Data Pointer
Description: Instruction first adds the 16-bit DPTR register to the accumulator. The result of addition is then used as a memory address from which the 8-bit data is moved to the accumulator. Syntax: MOVC A,@A+DPTR; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:Data: constant in the range of 0-65535 (0-FFFFh)
DPTR: Data Pointer
Description: Instruction stores a 16-bit constant to the DPTR register. The 8 high bits of the constant are stored in the DPH register, while the 8 low bits are stored in the DPL register. Syntax: MOV DPTR,#data; Bytes: 3 (instruction code, constant (15-8), constant (7-0)); STATUS register flags: No flags affected; EXAMPLE:Ri: register R0 or R1
A: accumulator
Description: Instruction reads the content of a register in external RAM and moves it to the accumulator. The register address is stored in the Ri register (R0 or R1). Syntax: MOVX A,@Ri; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:A: accumulator
PC: Program Counter
Description: Instruction first adds the 16-bit PC register to the accumulator (the current program address is stored in the PC register). The result of addition is then used as a memory address from which the 8-bit data is moved to the accumulator. Syntax: MOVC A,@A+PC; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:Ri: register R0 or R1
A: accumulator
Description: Instruction moves the accumulator to a register stored in external RAM. Its address is stored in the Ri register. Syntax: MOVX @Ri,A; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:A: accumulator DPRTR: Data Pointer
Description: Instruction moves the content of a register in external memory to the accumulator. The 16-bit address of the register is stored in the DPTR register (DPH and DPL). Syntax: MOVX A,@DPTR; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:A: accumulator
B: Register B
Description: Instruction multiplies the value in the accumulator with the value in the B register. The low-order byte of the 16-bit result is stored in the accumulator, while the high byte remains in the B register. If the result is larger than 255, the overflow flag is set. The carry flag is not affected. Syntax: MUL AB; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:A: accumulator
DPTR: Data Pointer
Description: Instruction moves the accumulator to a register stored in external RAM. The 16-bit address of the register is stored in the DPTR register (DPH and DPL). Syntax: MOVX @DPTR,A; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:Rn: any R register (R0-R7)
A: accumulator
Description: Instruction performs logic OR operation between the accumulator and Rn register. The result is stored in the accumulator. Syntax: ORL A,Rn; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:Ri: register R0 or R1
A: accumulator
Description: Instruction performs logic OR operation between the accumulator and a register. As it is indirect addressing, the register address is stored in the Ri register (R0 or R1). The result is stored in the accumulator. Syntax: ANL A,@Ri; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE:Direct: arbitrary register with address 0-255 (0-FFh)
A: accumulator
Description: Instruction performs logic OR operation between the accumulator and a register. As it is direct addressing, the register can be any SFRs or general-purpose register with address 0-7Fh (0-127 dec.). The result is stored in the accumulator. Syntax: ORL A,direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags affected; EXAMPLE:Direct: arbitrary register with address 0-255 (0-FFh)
A: accumulator
Description: Instruction performs logic OR operation between a register and accumulator. As it is direct addressing, the register can be any SFRs or general- purpose register with address 0-7Fh (0-127 dec.). The result is stored in the register. Syntax: ORL [register address], A; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags affected; EXAMPLE:Data: constant in the range of 0-255 (0-FFh)
A: accumulator
Description: Instruction performs logic OR operation between the accumulator and the immediate data. The result is stored in the accumulator. Syntax: ORL A, #data; Bytes: 2 (instruction code, data); STATUS register flags: No flags affected; EXAMPLE:C: Carry flag
Bit: any bit of RAM
Description: Instruction performs logic OR operation between the direct bit and the carry flag. The result is stored in the carry flag. Syntax: ORL C,bit; Bytes: 2 (instruction code, direct bit address); STATUS register flags: No flags affected; EXAMPLE:Direct: arbitrary register with address 0-255 (0-FFh)
Data: constant in the range of 0-255 (0-FFh)
Description: Instruction performs logic OR operation between the immediate data and the direct byte. As it is direct addressing, the direct byte can be any SFRs or general-purpose register with address 0-7Fh (0-127 dec.). The result is stored in the direct byte. Syntax: ORL [register address],#data; Bytes: 3 (instruction code, direct byte address, data); STATUS register flags: No flags affected; EXAMPLE:Direct: arbitrary register with address 0-255 (0-FFh)
Description: Instruction first reads data from the location being pointed to by the Stack. The data is then copied to the direct byte and the value of the Stack Pointer is decremented by 1. As it is direct addressing, the direct byte can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.). Syntax: POP direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags affected; EXAMPLE:C: carry flag
Bit: any bit of RAM
Description: Instruction performs logic OR operation between the addressed inverted bit and the carry flag. The result is stored in the carry flag.BIT | BIT | C | C AND BIT |
---|---|---|---|
0 | 1 | 0 | 0 |
0 | 1 | 1 | 1 |
1 | 0 | 0 | 0 |
1 | 0 | 1 | 0 |
Syntax: RET;
Byte: 1 (instruction code);
STATUS register flags: No flags affected;
EXAMPLE:Data: Arbitrary register with address 0-255 (0-FFh)
Description: Address currently pointed to by the Stack Pointer is first incremented by 1 and afterwards the data from the register Rx is copied to it. As it is direct addressing, the direct byte can be any SFRs or general-purpose register with address 0-7Fh. (0-127 dec.) Syntax: PUSH direct; Bytes: 2 (instruction code, direct byte address); STATUS register flags: No flags affected; EXAMPLE:A: accumulator
Description: Eight bits in the accumulator are rotated one bit left, so that the bit 7 is rotated into the bit 0 position. Syntax: RL A; Byte: 1 (instruction code); STATUS register flags: No flags affected; EXAMPLE: