APPENDIX E - Ladder diagram instructions

APPENDIX E Ladder diagram instructions (1/3)

"Ladder" is the most frequent method of programming PLC controllers at present. We could divide instructions on the input ones for stating the conditions and the output ones that are executed when the conditions are fulfilled. By combining the two, logical blocks are created according to the logic of the system being automated. The purpose of this appendix is to introduce these instructions and to give details on flags and limitations of each of these.

INDIRECT ADDRESSING

Placing the character “*” ahead of operand from DM memory area allows us to use the indirect addressing. Simply put, value in the word *DM will be the address of the word that is the true operand. The picture below shows the MOV instruction with one operand given indirectly. The contents of location DM0003 equal “1433” which is actually a pointer marking the address DM1433 with contents “0005”. The result of this instruction will be moving the value “0005” from word DM1433 to word LR00.

In order to use the indirect addressing, contents of the word that is the indirect operand have to be in BCD format. Besides that, value of the contents of indirect operand must not be greater than the number of addresses in DM area.

INSTRUCTION FORMAT

Operand is the address of a word or a bit in PLC controller memory (most of the instructions has one or more operands). The common term for a word is just “operand” and in the case of bit we call it “operand bit”. Also, operand can be a direct numerical value marked by character “#” placed ahead of the value (i.e.. #12, #345 etc).

The state of operand bit can be ON or OFF. ON means that its logic state equals “1”, while OFF stands for “0”. Besides these, terms “set” and “reset” are also used.

Symbols SV and PV commonly appear in instruction syntax. These abbreviations stand for “Set Value” and “Present Value” and are most frequently encountered with instructions concerning counters and timers.

DIFFERENTIAL INSTRUCTION FORM

Differential form is supported by almost all of the instructions. What differs this form from the classical one is the character “@” placed ahead of the name of the instruction. This form ensures that the instruction with condition fulfilled will not be executed in every cycle, but only when its condition changes state from OFF to ON. Differential from is commonly used because it has a lot of applications in real-life problems.

DIFFERENCE BETWEEN BINARY AND BCD REPRESENTATIONS OF WORD CONTENTS

Generally, there are two dominant ways for comprehending values of memory locations. The first is binary and is related to the contents of the word which is treated as a union of 16 bits. Value is calculated as a sum of each bit (0 or 1) multiplied by 2 on power n, where n represents the position of bit in the word. Bit of the least value has position zero, while bit of greatest value has position 15.

BCD is an abbreviation for “Binary Coded Decimal number”. It is nothing more than representing each decimal figure with 4 bits, similar to binary coding hence the name comes from. The picture below shows the difference between binary and BCD representations of the number. Same contents can be interpreted as either 612 or 264. For that reason, proper attention should be given to the format of the value within the word that will be sent to the instruction as an operand.

LADDER DIAGRAM INSTRUCTIONS

Instructions may be divided into several basic groups according to their purpose :

- Input instructions
- Output instructions
- Control instructions
- Timer/counter instructions
- Data comparison instructions
- Data movement instructions
- Increment/decrement instructions
- BCD/binary calculation instructions
- Data conversion instructions
- Logic instructions
- Special calculation instructions
- Subroutine instructions
- Interrupt control instructions
- I/O units instructions
- Display instructions
- High-speed counter control instructions
- Damage diagnosis instructions
- Special system instructions

Each of these instruction groups is introduced with a brief description in the following tables and with more detailed examples and descriptions afterwards.

Sequence Input Instructions

Instruction	Mnemonic	Code	Function
LOAD	LD	0	Connects an NO condition to the left bus bar.
LOAD NOT	LD NOT	0	Connects an NC condition to the left bus bar.
AND	AND	0	Connects an NO condition in series with the previous condition
AND NOT	AND NOT	0	Connects an NC condition in series with the previous condition
OR	OR	0	Connects an NO condition in parallel with the previous condition.
OR NOT	OR NOT	0	Connects an NC condition in parallel with the previous condition.
AND LOAD	AND LD	0	Connects two instruction blocks in series.
OR LOAD	OR LD	0	Connects two instruction blocks in parallel.

Sequence Output Instructions

Instruction	Mnemonic	Code	Function
OUTPUT	OUT	0	Outputs the result of logic to a bit.
OUT NOT	OUT NOT	0	Reverses and outputs the result of logic to a bit.
SET	SET	0	Force sets (ON) a bit.
RESET	RESET	0	Force resets (OFF) a bit.
KEEP	KEEP	11	Maintains the status of the designated bit.
DIFFERENTIATE UP	DIFU	13	Turns ON a bit for one cycle when the execution condition goes from OFF to ON.
DIFFERENTIATE DOWN	DIFD	14	Turns ON a bit for one cycle when the execution condition goes from ON to OFF.

Sequence Control Instructions

Instruction	Mnemonic	Code	Function
NO OPERATION	NOP	00	---
END	END	01	Required at the end of the program.
INTERLOCK	IL	02	It the execution condition for IL(02) is OFF, all outputs are turned OFF and all timer PVs reset between IL(02) and the next ILC(03).
INTERLOCK CLEAR	ILC	03	ILC(03) indicates the end of an interlock (beginning at IL(02)).
JUMP	JMP	04	If the execution condition for JMP(04) is ON, all instructions between JMP(04) and JME(05) are treated as NOP(OO).
JUMP END	JME	05	JME(05) indicates the end of a jump (beginning at JMP(04)).

Timer/Counter Instructions

Instruction	Mnemonic	Code	Function
TIMER	TIM	0	An ON-delay (decrementing) timer.
COUNTER	CNT	0	A decrementing counter.
REVERSIBLE COUNTER	CNTR	12	Increases or decreases PV by one.
HIGH-SPEED TIMER	TIMH	15	A high-speed, ON-delay (decrementing) timer.

Data Comparison Instructions

Instruction	Mnemonic	Code	Function
COMPARE	CMP	20	Compares two four-digit hexadecimal values.
DOUBLE COMPARE	CMPL	60	Compares two eight-digit hexadecimal values.
BLOCK COMPARE	(@)BCMP	68	Judges whether the value of a word is within 16 ranges (defined by lower and upper limits).
TABLE COMPARE	(@)TCMP	85	Compares the value of a word to 16 consecutive words.

Data Movement Instructions

Instruction	Mnemonic	Code	Function
MOVE	(@)MOV	21	Copies a constant or the content of a word to a word.
MOVE NOT	(@)MVN	22	Copies the complement of a constant or the content of a word to a word.
BLOCK TRANSFER	(@)XFER	70	Copies the content of a block of up to 1,000 consecutive words to a block of consecutive words.
BLOCK SET	(@)BSET	71	Copies the content of a word to a block of consecutive words.
DATA EXCHAGE	(@)XCHG	73	Exchanges the content of two words.
SINGLE WORD DISTRIBUTE	(@)DIST	80	Copies the content of a word to a word (whose address is determined by adding an offset to a word address).
DATA COLLECT	(@)COLL	81	Copies the content of a word (whose address is determined by adding an offset to a word address) to a word.
MOVE BIT	(@)MOVB	82	Copies the specified bit from one word to the specified bit of a word.
MOVE DIGIT	(@)MOVD	83	Copies the specified digits (4-bit units) from a word to the specified digits of a word.

Shift Instructions

Instruction	Mnemonic	Code	Function
SHIFT REGISTER	SFT	0/10	Copies the specified bit (0 or 1) into the rightmost bit of a shift register and shifts the other bits one bit to the left.
WORD SHIFT	(@)WSFT	16	Creates a multiple-word shift register that shifts data to the left in one-word units.
ASYNCHRONOUS SHIFT REGISTER	(@)ASFT	17	Creates a shift register that exchanges the contents of adjacent words when one is zero and the other is not.
ARITHMETIC SHIFT LEFT	(@)ASL	25	Shifts a 0 into bit 00 of the specified word and shifts the other bits one bit to the left.
ARITHMETIC SHIFT RIGHT	(@)ASR	26	Shifts a 0 into bit 15 of the specified word and shifts the other bits one bit to the right.
ROTATE LEFT	(@)ROL	27	Moves the content of CY into bit 00 of the specified word, shifts the other bits one bit to the left, and moves bit 15 to CY.
ROTATE RIGHT	(@)ROR	28	Moves the content of CY into bit 15 of the specified word, shifts the other bits one bit to the left, and moves bit 00 to CY.
ONE DIGIT SHIFT LEFT	(@)SLD	74	Shifts a 0 into the rightmost digit (4-bit unit) of the shift register and shifts the other digits one digit to the left.
ONE DIGIT SHIFT RIGHT	(@)SRD	75	Shifts a 0 into the rightmost digit (4-bit unit) of the shift register and shifts the other digits one digit to the right.
REVERSIBLE SHIFT REGISTER	(@)SFTR	84	Creates a single or multiple-word shift register that can shift data to the left or right.

Increment/Decrement Instructions

Instruction	Mnemonic	Code	Function
INCREMENT	(@)INC	38	Increments the BCD content of the specified word by 1.
DECREMENT	(@)DEC	39	Decrements the BCD content of the specified word by 1.

BCD/Binary Calculation Instructions

Instruction	Mnemonic	Code	Function
BCD ADD	(@)ADD	30	Adds the content of a word (or a constant).
BCD SUBTRACT	(@)SUB	31	Subtracts the contents of a word (or constant) and CY from the content of a word (or constant).
BDC MULTIPLY	(@)MUL	32	Multiplies the content of two words (or contents).
BCD DIVIDE	(@)DIV	33	Divides the contents of a word (or constant) by the content of a word (or constant).
BINARY ADD	(@)ADB	50	Adds the contents of two words (or constants) and CY.
BINARY SUBTRACT	(@)SBB	51	Subtracts the content of a word (or constant) an CY from the content of the word (or constant).
BINARY MULTIPLY	(©)MLB	52	Multiplies the contents of two words (or constants).
BINARY DIVIDE	(@)DVB	53	Divides the content of a word (or constant) by the content of a word and obtains the result and remainder.
DOUBLE BCD ADD	(@)ADDL